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177 lines
4.5 KiB
177 lines
4.5 KiB
%def bincmp(revcmp=""):
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/*
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* Generic two-operand compare-and-branch operation. Provide a "revcmp"
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* fragment that specifies the *reverse* comparison to perform, e.g.
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* for "if-le" you would use "gt".
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*
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* For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le
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*/
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/* if-cmp vA, vB, +CCCC */
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movl rINST, %ecx # rcx <- A+
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sarl $$4, rINST # rINST <- B
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andb $$0xf, %cl # rcx <- A
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GET_VREG %eax, %rcx # eax <- vA
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cmpl VREG_ADDRESS(rINSTq), %eax # compare (vA, vB)
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j${revcmp} 1f
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movswq 2(rPC), rINSTq # Get signed branch offset
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BRANCH
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1:
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ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
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%def zcmp(revcmp=""):
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/*
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* Generic one-operand compare-and-branch operation. Provide a "revcmp"
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* fragment that specifies the *reverse* comparison to perform, e.g.
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* for "if-le" you would use "gt".
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*
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* for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez
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*/
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/* if-cmp vAA, +BBBB */
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cmpl $$0, VREG_ADDRESS(rINSTq) # compare (vA, 0)
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j${revcmp} 1f
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movswq 2(rPC), rINSTq # fetch signed displacement
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BRANCH
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1:
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ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
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%def op_goto():
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/*
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* Unconditional branch, 8-bit offset.
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*
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* The branch distance is a signed code-unit offset, which we need to
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* double to get a byte offset.
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*/
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/* goto +AA */
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movsbq rINSTbl, rINSTq # rINSTq <- ssssssAA
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BRANCH
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%def op_goto_16():
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/*
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* Unconditional branch, 16-bit offset.
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*
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* The branch distance is a signed code-unit offset, which we need to
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* double to get a byte offset.
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*/
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/* goto/16 +AAAA */
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movswq 2(rPC), rINSTq # rINSTq <- ssssAAAA
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BRANCH
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%def op_goto_32():
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/*
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* Unconditional branch, 32-bit offset.
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*
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* The branch distance is a signed code-unit offset, which we need to
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* double to get a byte offset.
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*
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* Because we need the SF bit set, we'll use an adds
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* to convert from Dalvik offset to byte offset.
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*/
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/* goto/32 +AAAAAAAA */
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movslq 2(rPC), rINSTq # rINSTq <- AAAAAAAA
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BRANCH
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%def op_if_eq():
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% bincmp(revcmp="ne")
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%def op_if_eqz():
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% zcmp(revcmp="ne")
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%def op_if_ge():
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% bincmp(revcmp="l")
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%def op_if_gez():
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% zcmp(revcmp="l")
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%def op_if_gt():
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% bincmp(revcmp="le")
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%def op_if_gtz():
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% zcmp(revcmp="le")
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%def op_if_le():
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% bincmp(revcmp="g")
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%def op_if_lez():
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% zcmp(revcmp="g")
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%def op_if_lt():
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% bincmp(revcmp="ge")
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%def op_if_ltz():
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% zcmp(revcmp="ge")
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%def op_if_ne():
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% bincmp(revcmp="e")
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%def op_if_nez():
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% zcmp(revcmp="e")
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%def op_packed_switch(func="NterpDoPackedSwitch"):
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/*
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* Handle a packed-switch or sparse-switch instruction. In both cases
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* we decode it and hand it off to a helper function.
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*
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* We don't really expect backward branches in a switch statement, but
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* they're perfectly legal, so we check for them here.
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*
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* for: packed-switch, sparse-switch
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*/
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/* op vAA, +BBBB */
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movslq 2(rPC), OUT_ARG0 # rcx <- ssssssssBBBBbbbb
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leaq (rPC,OUT_ARG0,2), OUT_ARG0 # rcx <- PC + ssssssssBBBBbbbb*2
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GET_VREG OUT_32_ARG1, rINSTq # eax <- vAA
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call SYMBOL($func)
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movslq %eax, rINSTq
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BRANCH
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/*
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* Return a 32-bit value.
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*/
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%def op_return(is_object="0"):
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GET_VREG %eax, rINSTq # eax <- vAA
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.if !$is_object
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// In case we're going back to compiled code, put the
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// result also in a xmm register.
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movd %eax, %xmm0
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.endif
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CFI_REMEMBER_STATE
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movq -8(rREFS), %rsp
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CFI_DEF_CFA(rsp, CALLEE_SAVES_SIZE)
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RESTORE_ALL_CALLEE_SAVES
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ret
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CFI_RESTORE_STATE
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%def op_return_object():
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% op_return(is_object="1")
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%def op_return_void():
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// Thread fence for constructor is a no-op on x86_64.
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CFI_REMEMBER_STATE
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movq -8(rREFS), %rsp
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CFI_DEF_CFA(rsp, CALLEE_SAVES_SIZE)
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RESTORE_ALL_CALLEE_SAVES
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ret
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CFI_RESTORE_STATE
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%def op_return_wide():
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GET_WIDE_VREG %rax, rINSTq # eax <- vAA
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// In case we're going back to compiled code, put the
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// result also in a xmm register.
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movq %rax, %xmm0
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CFI_REMEMBER_STATE
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movq -8(rREFS), %rsp
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CFI_DEF_CFA(rsp, CALLEE_SAVES_SIZE)
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RESTORE_ALL_CALLEE_SAVES
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ret
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CFI_RESTORE_STATE
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%def op_sparse_switch():
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% op_packed_switch(func="NterpDoSparseSwitch")
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%def op_throw():
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EXPORT_PC
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GET_VREG %edi, rINSTq # edi<- vAA (exception object)
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movq rSELF:THREAD_SELF_OFFSET, %rsi
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call SYMBOL(art_quick_deliver_exception)
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int3
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