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98 lines
4.4 KiB
98 lines
4.4 KiB
Arm FPGA Platform
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=================
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This platform supports FPGA images used internally in Arm Ltd., for
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testing and bringup of new cores. With that focus, peripheral support is
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minimal: there is no mass storage or display output, for instance. Also
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this port ignores any power management features of the platform.
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Some interconnect setup is done internally by the platform, so the TF-A code
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just needs to setup UART and GIC.
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The FPGA platform requires to pass on a DTB for the non-secure payload
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(mostly Linux), so we let TF-A use information from the DTB for dynamic
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configuration: the UART and GIC base addresses are read from there.
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As a result this port is a fairly generic BL31-only port, which can serve
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as a template for a minimal new (and possibly DT-based) platform port.
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The aim of this port is to support as many FPGA images as possible with
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a single build. Image specific data must be described in the DTB or should
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be auto-detected at runtime.
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As the number and topology layout of the CPU cores differs significantly
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across the various images, this is detected at runtime by BL31.
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The /cpus node in the DT will be added and filled accordingly, as long as
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it does not exist already.
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Platform-specific build options
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-------------------------------
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- ``SUPPORT_UNKNOWN_MPID`` : Boolean option to allow unknown MPIDR registers.
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Normally TF-A panics if it encounters a MPID value not matched to its
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internal list, but for new or experimental cores this creates a lot of
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churn. With this option, the code will fall back to some basic CPU support
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code (only architectural system registers, and no errata).
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Default value of this flag is 1.
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- ``PRELOADED_BL33_BASE`` : Physical address of the BL33 non-secure payload.
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It must have been loaded into DRAM already, typically this is done by
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the script that also loads BL31 and the DTB.
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It defaults to 0x80080000, which is the traditional load address for an
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arm64 Linux kernel.
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- ``FPGA_PRELOADED_DTB_BASE`` : Physical address of the flattened device
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tree blob (DTB). This DT will be used by TF-A for dynamic configuration,
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so it must describe at least the UART and a GICv3 interrupt controller.
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The DT gets amended by the code, to potentially add a command line and
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fill the CPU topology nodes. It will also be passed on to BL33, by
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putting its address into the x0 register before jumping to the entry
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point (following the Linux kernel boot protocol).
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It defaults to 0x80070000, which is 64KB before the BL33 load address.
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- ``FPGA_PRELOADED_CMD_LINE`` : Physical address of the command line to
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put into the devicetree blob. Due to the lack of a proper bootloader,
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a command line can be put somewhere into memory, so that BL31 will
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detect it and copy it into the DTB passed on to BL33.
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To avoid random garbage, there needs to be a "CMD:" signature before the
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actual command line.
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Defaults to 0x1000, which is normally in the "ROM" space of the typical
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FPGA image (which can be written by the FPGA payload uploader, but is
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read-only to the CPU). The FPGA payload tool should be given a text file
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containing the desired command line, prefixed by the "CMD:" signature.
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Building the TF-A image
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-----------------------
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.. code:: shell
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make PLAT=arm_fgpa DEBUG=1
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This will use the default load addresses as described above. When those
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addresses need to differ for a certain setup, they can be passed on the
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make command line:
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.. code:: shell
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make PLAT=arm_fgpa DEBUG=1 PRELOADED_BL33_BASE=0x80200000 FPGA_PRELOADED_DTB_BASE=0x80180000 bl31
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Running the TF-A image
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----------------------
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After building TF-A, the actual TF-A code will be located in ``bl31.bin`` in
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the build directory.
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Additionally there is a ``bl31.axf`` ELF file, which contains BL31, as well
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as some simple ROM trampoline code (required by the Arm FPGA boot flow) and
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a generic DTB to support most of the FPGA images. This can be simply handed
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over to the FPGA payload uploader, which will take care of loading the
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components at their respective load addresses. In addition to this file
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you need at least a BL33 payload (typically a Linux kernel image), optionally
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a Linux initrd image file and possibly a command line:
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.. code:: shell
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fpga-run ... -m bl31.axf -l auto -m Image -l 0x80080000 -m initrd.gz -l 0x84000000 -m cmdline.txt -l 0x1000
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--------------
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*Copyright (c) 2020, Arm Limited. All rights reserved.*
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