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687 lines
18 KiB
687 lines
18 KiB
/*
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* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include "emmc_config.h"
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#include "emmc_def.h"
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#include "emmc_hal.h"
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#include "emmc_registers.h"
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#include "emmc_std.h"
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#include "micro_delay.h"
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#include "rcar_def.h"
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static EMMC_ERROR_CODE emmc_clock_ctrl(uint8_t mode);
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static EMMC_ERROR_CODE emmc_card_init(void);
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static EMMC_ERROR_CODE emmc_high_speed(void);
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static EMMC_ERROR_CODE emmc_bus_width(uint32_t width);
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static uint32_t emmc_set_timeout_register_value(uint32_t freq);
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static void set_sd_clk(uint32_t clkDiv);
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static uint32_t emmc_calc_tran_speed(uint32_t *freq);
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static void emmc_get_partition_access(void);
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static void emmc_set_bootpartition(void);
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static void emmc_set_bootpartition(void)
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{
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uint32_t reg;
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reg = mmio_read_32(RCAR_PRR) & (PRR_PRODUCT_MASK | PRR_CUT_MASK);
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if (reg == PRR_PRODUCT_M3_CUT10) {
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mmc_drv_obj.boot_partition_en =
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(EMMC_PARTITION_ID) ((mmc_drv_obj.ext_csd_data[179] &
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EMMC_BOOT_PARTITION_EN_MASK) >>
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EMMC_BOOT_PARTITION_EN_SHIFT);
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} else if ((reg == PRR_PRODUCT_H3_CUT20)
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|| (reg == PRR_PRODUCT_M3_CUT11)) {
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mmc_drv_obj.boot_partition_en = mmc_drv_obj.partition_access;
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} else {
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if ((mmio_read_32(MFISBTSTSR) & MFISBTSTSR_BOOT_PARTITION) !=
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0U) {
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mmc_drv_obj.boot_partition_en = PARTITION_ID_BOOT_2;
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} else {
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mmc_drv_obj.boot_partition_en = PARTITION_ID_BOOT_1;
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}
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}
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}
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static EMMC_ERROR_CODE emmc_card_init(void)
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{
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int32_t retry;
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uint32_t freq = MMC_400KHZ; /* 390KHz */
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EMMC_ERROR_CODE result;
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uint32_t result_calc;
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/* state check */
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if ((mmc_drv_obj.initialize != TRUE)
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|| (mmc_drv_obj.card_power_enable != TRUE)
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|| ((GETR_32(SD_INFO2) & SD_INFO2_CBSY) != 0)
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) {
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emmc_write_error_info(EMMC_FUNCNO_CARD_INIT, EMMC_ERR_STATE);
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return EMMC_ERR_STATE;
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}
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/* clock on (force change) */
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mmc_drv_obj.current_freq = 0;
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mmc_drv_obj.max_freq = MMC_20MHZ;
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result = emmc_set_request_mmc_clock(&freq);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return EMMC_ERR;
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}
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rcar_micro_delay(1000U); /* wait 1ms */
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/* Get current access partition */
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emmc_get_partition_access();
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/* CMD0, arg=0x00000000 */
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result = emmc_send_idle_cmd(0x00000000);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return result;
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}
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rcar_micro_delay(200U); /* wait 74clock 390kHz(189.74us) */
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/* CMD1 */
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emmc_make_nontrans_cmd(CMD1_SEND_OP_COND, EMMC_HOST_OCR_VALUE);
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for (retry = 300; retry > 0; retry--) {
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result =
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emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return result;
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}
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if ((mmc_drv_obj.r3_ocr & EMMC_OCR_STATUS_BIT) != 0) {
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break; /* card is ready. exit loop */
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}
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rcar_micro_delay(1000U); /* wait 1ms */
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}
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if (retry == 0) {
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emmc_write_error_info(EMMC_FUNCNO_CARD_INIT, EMMC_ERR_TIMEOUT);
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return EMMC_ERR_TIMEOUT;
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}
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switch (mmc_drv_obj.r3_ocr & EMMC_OCR_ACCESS_MODE_MASK) {
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case EMMC_OCR_ACCESS_MODE_SECT:
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mmc_drv_obj.access_mode = TRUE; /* sector mode */
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break;
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default:
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/* unknown value */
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emmc_write_error_info(EMMC_FUNCNO_CARD_INIT, EMMC_ERR);
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return EMMC_ERR;
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}
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/* CMD2 */
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emmc_make_nontrans_cmd(CMD2_ALL_SEND_CID_MMC, 0x00000000);
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mmc_drv_obj.response = (uint32_t *) (&mmc_drv_obj.cid_data[0]); /* use CID special buffer */
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return result;
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}
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/* CMD3 */
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emmc_make_nontrans_cmd(CMD3_SET_RELATIVE_ADDR, EMMC_RCA << 16);
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return result;
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}
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/* CMD9 (CSD) */
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emmc_make_nontrans_cmd(CMD9_SEND_CSD, EMMC_RCA << 16);
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mmc_drv_obj.response = (uint32_t *) (&mmc_drv_obj.csd_data[0]); /* use CSD special buffer */
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return result;
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}
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/* card version check */
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if (EMMC_CSD_SPEC_VARS() < 4) {
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emmc_write_error_info(EMMC_FUNCNO_CARD_INIT,
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EMMC_ERR_ILLEGAL_CARD);
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return EMMC_ERR_ILLEGAL_CARD;
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}
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/* CMD7 (select card) */
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emmc_make_nontrans_cmd(CMD7_SELECT_CARD, EMMC_RCA << 16);
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return result;
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}
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mmc_drv_obj.selected = TRUE;
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/*
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* card speed check
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* Card spec is calculated from TRAN_SPEED(CSD)
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*/
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result_calc = emmc_calc_tran_speed(&freq);
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if (result_calc == 0) {
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emmc_write_error_info(EMMC_FUNCNO_CARD_INIT,
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EMMC_ERR_ILLEGAL_CARD);
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return EMMC_ERR_ILLEGAL_CARD;
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}
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mmc_drv_obj.max_freq = freq; /* max frequency (card spec) */
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result = emmc_set_request_mmc_clock(&freq);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return EMMC_ERR;
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}
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/* set read/write timeout */
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mmc_drv_obj.data_timeout = emmc_set_timeout_register_value(freq);
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SETR_32(SD_OPTION,
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((GETR_32(SD_OPTION) & ~(SD_OPTION_TIMEOUT_CNT_MASK)) |
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mmc_drv_obj.data_timeout));
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/* SET_BLOCKLEN(512byte) */
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/* CMD16 */
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emmc_make_nontrans_cmd(CMD16_SET_BLOCKLEN, EMMC_BLOCK_LENGTH);
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return result;
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}
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/* Transfer Data Length */
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SETR_32(SD_SIZE, EMMC_BLOCK_LENGTH);
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/* CMD8 (EXT_CSD) */
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emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000,
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(uint32_t *) (&mmc_drv_obj.ext_csd_data[0]),
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EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ,
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HAL_MEMCARD_NOT_DMA);
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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/*
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* CMD12 is not send.
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* If BUS initialization is failed, user must be execute Bus initialization again.
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* Bus initialization is start CMD0(soft reset command).
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*/
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emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
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return result;
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}
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/* Set boot partition */
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emmc_set_bootpartition();
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return EMMC_SUCCESS;
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}
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static EMMC_ERROR_CODE emmc_high_speed(void)
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{
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uint32_t freq; /* High speed mode clock frequency */
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EMMC_ERROR_CODE result;
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uint8_t cardType;
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/* state check */
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if (mmc_drv_obj.selected != TRUE) {
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emmc_write_error_info(EMMC_FUNCNO_HIGH_SPEED, EMMC_ERR_STATE);
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return EMMC_ERR_STATE;
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}
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/* max frequency */
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cardType = (uint8_t) mmc_drv_obj.ext_csd_data[EMMC_EXT_CSD_CARD_TYPE];
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if ((cardType & EMMC_EXT_CSD_CARD_TYPE_52MHZ) != 0)
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freq = MMC_52MHZ;
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else if ((cardType & EMMC_EXT_CSD_CARD_TYPE_26MHZ) != 0)
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freq = MMC_26MHZ;
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else
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freq = MMC_20MHZ;
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/* Hi-Speed-mode selection */
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if ((freq == MMC_52MHZ) || (freq == MMC_26MHZ)) {
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/* CMD6 */
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emmc_make_nontrans_cmd(CMD6_SWITCH, EMMC_SWITCH_HS_TIMING);
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result =
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emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_HIGH_SPEED);
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return result;
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}
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mmc_drv_obj.hs_timing = TIMING_HIGH_SPEED; /* High-Speed */
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}
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/* set mmc clock */
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mmc_drv_obj.max_freq = freq;
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result = emmc_set_request_mmc_clock(&freq);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_HIGH_SPEED);
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return EMMC_ERR;
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}
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/* set read/write timeout */
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mmc_drv_obj.data_timeout = emmc_set_timeout_register_value(freq);
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SETR_32(SD_OPTION,
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((GETR_32(SD_OPTION) & ~(SD_OPTION_TIMEOUT_CNT_MASK)) |
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mmc_drv_obj.data_timeout));
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/* CMD13 */
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emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16);
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result =
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emmc_exec_cmd(EMMC_R1_ERROR_MASK_WITHOUT_CRC, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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emmc_write_error_info_func_no(EMMC_FUNCNO_HIGH_SPEED);
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return result;
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}
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return EMMC_SUCCESS;
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}
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static EMMC_ERROR_CODE emmc_clock_ctrl(uint8_t mode)
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{
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uint32_t value;
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/* busy check */
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if ((GETR_32(SD_INFO2) & SD_INFO2_CBSY) != 0) {
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emmc_write_error_info(EMMC_FUNCNO_SET_CLOCK,
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EMMC_ERR_CARD_BUSY);
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return EMMC_ERR;
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}
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if (mode == TRUE) {
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/* clock ON */
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value =
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((GETR_32(SD_CLK_CTRL) | MMC_SD_CLK_START) &
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SD_CLK_WRITE_MASK);
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SETR_32(SD_CLK_CTRL, value); /* on */
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mmc_drv_obj.clock_enable = TRUE;
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} else {
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/* clock OFF */
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value =
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((GETR_32(SD_CLK_CTRL) & MMC_SD_CLK_STOP) &
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SD_CLK_WRITE_MASK);
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SETR_32(SD_CLK_CTRL, value); /* off */
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mmc_drv_obj.clock_enable = FALSE;
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}
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return EMMC_SUCCESS;
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}
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static EMMC_ERROR_CODE emmc_bus_width(uint32_t width)
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{
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EMMC_ERROR_CODE result = EMMC_ERR;
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/* parameter check */
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if ((width != 8) && (width != 4) && (width != 1)) {
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emmc_write_error_info(EMMC_FUNCNO_BUS_WIDTH, EMMC_ERR_PARAM);
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return EMMC_ERR_PARAM;
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}
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/* state check */
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if (mmc_drv_obj.selected != TRUE) {
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emmc_write_error_info(EMMC_FUNCNO_BUS_WIDTH, EMMC_ERR_STATE);
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return EMMC_ERR_STATE;
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}
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/* 2 = 8bit, 1 = 4bit, 0 =1bit */
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mmc_drv_obj.bus_width = (HAL_MEMCARD_DATA_WIDTH) (width >> 2);
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/* CMD6 */
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emmc_make_nontrans_cmd(CMD6_SWITCH,
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(EMMC_SWITCH_BUS_WIDTH_1 |
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(mmc_drv_obj.bus_width << 8)));
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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/* occurred error */
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mmc_drv_obj.bus_width = HAL_MEMCARD_DATA_WIDTH_1_BIT;
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goto EXIT;
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}
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switch (mmc_drv_obj.bus_width) {
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case HAL_MEMCARD_DATA_WIDTH_1_BIT:
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SETR_32(SD_OPTION,
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((GETR_32(SD_OPTION) & ~(BIT15 | BIT13)) | BIT15));
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break;
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case HAL_MEMCARD_DATA_WIDTH_4_BIT:
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SETR_32(SD_OPTION, (GETR_32(SD_OPTION) & ~(BIT15 | BIT13)));
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break;
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case HAL_MEMCARD_DATA_WIDTH_8_BIT:
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SETR_32(SD_OPTION,
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((GETR_32(SD_OPTION) & ~(BIT15 | BIT13)) | BIT13));
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break;
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default:
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goto EXIT;
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}
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/* CMD13 */
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emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16);
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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goto EXIT;
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}
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/* CMD8 (EXT_CSD) */
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emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000,
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(uint32_t *) (&mmc_drv_obj.ext_csd_data[0]),
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EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ,
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HAL_MEMCARD_NOT_DMA);
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result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
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if (result != EMMC_SUCCESS) {
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goto EXIT;
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}
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return EMMC_SUCCESS;
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EXIT:
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emmc_write_error_info(EMMC_FUNCNO_BUS_WIDTH, result);
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ERROR("BL2: emmc bus_width error end\n");
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return result;
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}
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EMMC_ERROR_CODE emmc_select_partition(EMMC_PARTITION_ID id)
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{
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EMMC_ERROR_CODE result;
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uint32_t arg;
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uint32_t partition_config;
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/* state check */
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if (mmc_drv_obj.mount != TRUE) {
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emmc_write_error_info(EMMC_FUNCNO_NONE, EMMC_ERR_STATE);
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return EMMC_ERR_STATE;
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}
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/* id = PARTITION_ACCESS(Bit[2:0]) */
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if ((id & ~PARTITION_ID_MASK) != 0) {
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emmc_write_error_info(EMMC_FUNCNO_NONE, EMMC_ERR_PARAM);
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return EMMC_ERR_PARAM;
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}
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/* EXT_CSD[179] value */
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partition_config =
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(uint32_t) mmc_drv_obj.ext_csd_data[EMMC_EXT_CSD_PARTITION_CONFIG];
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if ((partition_config & PARTITION_ID_MASK) == id) {
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result = EMMC_SUCCESS;
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} else {
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partition_config =
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(uint32_t) ((partition_config & ~PARTITION_ID_MASK) | id);
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arg = EMMC_SWITCH_PARTITION_CONFIG | (partition_config << 8);
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result = emmc_set_ext_csd(arg);
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}
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return result;
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}
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static void set_sd_clk(uint32_t clkDiv)
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{
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uint32_t dataL;
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dataL = (GETR_32(SD_CLK_CTRL) & (~SD_CLK_CTRL_CLKDIV_MASK));
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switch (clkDiv) {
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case 1:
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dataL |= 0x000000FFU;
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break; /* 1/1 */
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case 2:
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dataL |= 0x00000000U;
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break; /* 1/2 */
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case 4:
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dataL |= 0x00000001U;
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break; /* 1/4 */
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case 8:
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dataL |= 0x00000002U;
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break; /* 1/8 */
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case 16:
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dataL |= 0x00000004U;
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break; /* 1/16 */
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case 32:
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dataL |= 0x00000008U;
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break; /* 1/32 */
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case 64:
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dataL |= 0x00000010U;
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break; /* 1/64 */
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case 128:
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dataL |= 0x00000020U;
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break; /* 1/128 */
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case 256:
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dataL |= 0x00000040U;
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break; /* 1/256 */
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case 512:
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dataL |= 0x00000080U;
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break; /* 1/512 */
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}
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SETR_32(SD_CLK_CTRL, dataL);
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mmc_drv_obj.current_freq = (uint32_t) clkDiv;
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}
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static void emmc_get_partition_access(void)
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|
{
|
|
uint32_t reg;
|
|
EMMC_ERROR_CODE result;
|
|
|
|
reg = mmio_read_32(RCAR_PRR) & (PRR_PRODUCT_MASK | PRR_CUT_MASK);
|
|
if ((reg == PRR_PRODUCT_H3_CUT20) || (reg == PRR_PRODUCT_M3_CUT11)) {
|
|
SETR_32(SD_OPTION, 0x000060EEU); /* 8 bits width */
|
|
/* CMD8 (EXT_CSD) */
|
|
emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000U,
|
|
(uint32_t *) (&mmc_drv_obj.ext_csd_data[0]),
|
|
EMMC_MAX_EXT_CSD_LENGTH,
|
|
HAL_MEMCARD_READ, HAL_MEMCARD_NOT_DMA);
|
|
mmc_drv_obj.get_partition_access_flag = TRUE;
|
|
result =
|
|
emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
|
|
mmc_drv_obj.get_partition_access_flag = FALSE;
|
|
if (result == EMMC_SUCCESS) {
|
|
mmc_drv_obj.partition_access =
|
|
(EMMC_PARTITION_ID) (mmc_drv_obj.ext_csd_data[179]
|
|
& PARTITION_ID_MASK);
|
|
} else if (result == EMMC_ERR_CMD_TIMEOUT) {
|
|
mmc_drv_obj.partition_access = PARTITION_ID_BOOT_1;
|
|
} else {
|
|
emmc_write_error_info(EMMC_FUNCNO_GET_PERTITION_ACCESS,
|
|
result);
|
|
panic();
|
|
}
|
|
SETR_32(SD_OPTION, 0x0000C0EEU); /* Initialize */
|
|
}
|
|
}
|
|
|
|
static uint32_t emmc_calc_tran_speed(uint32_t *freq)
|
|
{
|
|
const uint32_t unit[8] = { 10000U, 100000U, 1000000U, 10000000U,
|
|
0U, 0U, 0U, 0U }; /* frequency unit (1/10) */
|
|
const uint32_t mult[16] = { 0U, 10U, 12U, 13U, 15U, 20U, 26U, 30U, 35U,
|
|
40U, 45U, 52U, 55U, 60U, 70U, 80U };
|
|
uint32_t tran_speed = EMMC_CSD_TRAN_SPEED();
|
|
uint32_t max_freq;
|
|
uint32_t result;
|
|
|
|
/*
|
|
* tran_speed = 0x32
|
|
* unit[tran_speed&0x7] = uint[0x2] = 1000000
|
|
* mult[(tran_speed&0x78)>>3] = mult[0x30>>3] = mult[6] = 26
|
|
* 1000000 * 26 = 26000000 (26MHz)
|
|
*/
|
|
|
|
result = 1;
|
|
max_freq =
|
|
unit[tran_speed & EMMC_TRANSPEED_FREQ_UNIT_MASK] *
|
|
mult[(tran_speed & EMMC_TRANSPEED_MULT_MASK) >>
|
|
EMMC_TRANSPEED_MULT_SHIFT];
|
|
|
|
if (max_freq == 0) {
|
|
result = 0;
|
|
} else if (max_freq >= MMC_FREQ_52MHZ) {
|
|
*freq = MMC_52MHZ;
|
|
} else if (max_freq >= MMC_FREQ_26MHZ) {
|
|
*freq = MMC_26MHZ;
|
|
} else if (max_freq >= MMC_FREQ_20MHZ) {
|
|
*freq = MMC_20MHZ;
|
|
} else {
|
|
*freq = MMC_400KHZ;
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
static uint32_t emmc_set_timeout_register_value(uint32_t freq)
|
|
{
|
|
uint32_t timeout_cnt; /* SD_OPTION - Timeout Counter */
|
|
|
|
switch (freq) {
|
|
case 1U:
|
|
timeout_cnt = 0xE0U;
|
|
break; /* SDCLK * 2^27 */
|
|
case 2U:
|
|
timeout_cnt = 0xE0U;
|
|
break; /* SDCLK * 2^27 */
|
|
case 4U:
|
|
timeout_cnt = 0xD0U;
|
|
break; /* SDCLK * 2^26 */
|
|
case 8U:
|
|
timeout_cnt = 0xC0U;
|
|
break; /* SDCLK * 2^25 */
|
|
case 16U:
|
|
timeout_cnt = 0xB0U;
|
|
break; /* SDCLK * 2^24 */
|
|
case 32U:
|
|
timeout_cnt = 0xA0U;
|
|
break; /* SDCLK * 2^23 */
|
|
case 64U:
|
|
timeout_cnt = 0x90U;
|
|
break; /* SDCLK * 2^22 */
|
|
case 128U:
|
|
timeout_cnt = 0x80U;
|
|
break; /* SDCLK * 2^21 */
|
|
case 256U:
|
|
timeout_cnt = 0x70U;
|
|
break; /* SDCLK * 2^20 */
|
|
case 512U:
|
|
timeout_cnt = 0x70U;
|
|
break; /* SDCLK * 2^20 */
|
|
default:
|
|
timeout_cnt = 0xE0U;
|
|
break; /* SDCLK * 2^27 */
|
|
}
|
|
|
|
return timeout_cnt;
|
|
}
|
|
|
|
EMMC_ERROR_CODE emmc_set_ext_csd(uint32_t arg)
|
|
{
|
|
EMMC_ERROR_CODE result;
|
|
|
|
/* CMD6 */
|
|
emmc_make_nontrans_cmd(CMD6_SWITCH, arg);
|
|
result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
|
|
if (result != EMMC_SUCCESS) {
|
|
return result;
|
|
}
|
|
|
|
/* CMD13 */
|
|
emmc_make_nontrans_cmd(CMD13_SEND_STATUS, EMMC_RCA << 16);
|
|
result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
|
|
if (result != EMMC_SUCCESS) {
|
|
return result;
|
|
}
|
|
|
|
/* CMD8 (EXT_CSD) */
|
|
emmc_make_trans_cmd(CMD8_SEND_EXT_CSD, 0x00000000,
|
|
(uint32_t *) (&mmc_drv_obj.ext_csd_data[0]),
|
|
EMMC_MAX_EXT_CSD_LENGTH, HAL_MEMCARD_READ,
|
|
HAL_MEMCARD_NOT_DMA);
|
|
result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response);
|
|
if (result != EMMC_SUCCESS) {
|
|
return result;
|
|
}
|
|
return EMMC_SUCCESS;
|
|
}
|
|
|
|
EMMC_ERROR_CODE emmc_set_request_mmc_clock(uint32_t *freq)
|
|
{
|
|
/* parameter check */
|
|
if (freq == NULL) {
|
|
emmc_write_error_info(EMMC_FUNCNO_SET_CLOCK, EMMC_ERR_PARAM);
|
|
return EMMC_ERR_PARAM;
|
|
}
|
|
|
|
/* state check */
|
|
if ((mmc_drv_obj.initialize != TRUE)
|
|
|| (mmc_drv_obj.card_power_enable != TRUE)) {
|
|
emmc_write_error_info(EMMC_FUNCNO_SET_CLOCK, EMMC_ERR_STATE);
|
|
return EMMC_ERR_STATE;
|
|
}
|
|
|
|
/* clock is already running in the desired frequency. */
|
|
if ((mmc_drv_obj.clock_enable == TRUE)
|
|
&& (mmc_drv_obj.current_freq == *freq)) {
|
|
return EMMC_SUCCESS;
|
|
}
|
|
|
|
/* busy check */
|
|
if ((GETR_32(SD_INFO2) & SD_INFO2_CBSY) != 0) {
|
|
emmc_write_error_info(EMMC_FUNCNO_SET_CLOCK,
|
|
EMMC_ERR_CARD_BUSY);
|
|
return EMMC_ERR;
|
|
}
|
|
|
|
set_sd_clk(*freq);
|
|
mmc_drv_obj.clock_enable = FALSE;
|
|
|
|
return emmc_clock_ctrl(TRUE); /* clock on */
|
|
}
|
|
|
|
EMMC_ERROR_CODE rcar_emmc_mount(void)
|
|
{
|
|
EMMC_ERROR_CODE result;
|
|
|
|
/* state check */
|
|
if ((mmc_drv_obj.initialize != TRUE)
|
|
|| (mmc_drv_obj.card_power_enable != TRUE)
|
|
|| ((GETR_32(SD_INFO2) & SD_INFO2_CBSY) != 0)
|
|
) {
|
|
emmc_write_error_info(EMMC_FUNCNO_MOUNT, EMMC_ERR_STATE);
|
|
return EMMC_ERR_STATE;
|
|
}
|
|
|
|
/* initialize card (IDLE state --> Transfer state) */
|
|
result = emmc_card_init();
|
|
if (result != EMMC_SUCCESS) {
|
|
emmc_write_error_info_func_no(EMMC_FUNCNO_CARD_INIT);
|
|
if (emmc_clock_ctrl(FALSE) != EMMC_SUCCESS) {
|
|
/* nothing to do. */
|
|
}
|
|
return result;
|
|
}
|
|
|
|
/* Switching high speed mode */
|
|
result = emmc_high_speed();
|
|
if (result != EMMC_SUCCESS) {
|
|
emmc_write_error_info_func_no(EMMC_FUNCNO_HIGH_SPEED);
|
|
if (emmc_clock_ctrl(FALSE) != EMMC_SUCCESS) {
|
|
/* nothing to do. */
|
|
}
|
|
return result;
|
|
}
|
|
|
|
/* Changing the data bus width */
|
|
result = emmc_bus_width(8);
|
|
if (result != EMMC_SUCCESS) {
|
|
emmc_write_error_info_func_no(EMMC_FUNCNO_BUS_WIDTH);
|
|
if (emmc_clock_ctrl(FALSE) != EMMC_SUCCESS) {
|
|
/* nothing to do. */
|
|
}
|
|
return result;
|
|
}
|
|
|
|
/* mount complete */
|
|
mmc_drv_obj.mount = TRUE;
|
|
|
|
return EMMC_SUCCESS;
|
|
}
|