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59 lines
2.0 KiB
59 lines
2.0 KiB
/*
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* Copyright (c) 2019, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef DRIVERS_SPI_NOR_H
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#define DRIVERS_SPI_NOR_H
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#include <drivers/spi_mem.h>
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/* OPCODE */
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#define SPI_NOR_OP_WREN 0x06U /* Write enable */
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#define SPI_NOR_OP_WRSR 0x01U /* Write status register 1 byte */
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#define SPI_NOR_OP_READ_ID 0x9FU /* Read JEDEC ID */
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#define SPI_NOR_OP_READ_CR 0x35U /* Read configuration register */
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#define SPI_NOR_OP_READ_SR 0x05U /* Read status register */
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#define SPI_NOR_OP_READ_FSR 0x70U /* Read flag status register */
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#define SPINOR_OP_RDEAR 0xC8U /* Read Extended Address Register */
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#define SPINOR_OP_WREAR 0xC5U /* Write Extended Address Register */
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/* Used for Spansion flashes only. */
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#define SPINOR_OP_BRWR 0x17U /* Bank register write */
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#define SPINOR_OP_BRRD 0x16U /* Bank register read */
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#define SPI_NOR_OP_READ 0x03U /* Read data bytes (low frequency) */
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#define SPI_NOR_OP_READ_FAST 0x0BU /* Read data bytes (high frequency) */
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#define SPI_NOR_OP_READ_1_1_2 0x3BU /* Read data bytes (Dual Output SPI) */
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#define SPI_NOR_OP_READ_1_2_2 0xBBU /* Read data bytes (Dual I/O SPI) */
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#define SPI_NOR_OP_READ_1_1_4 0x6BU /* Read data bytes (Quad Output SPI) */
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#define SPI_NOR_OP_READ_1_4_4 0xEBU /* Read data bytes (Quad I/O SPI) */
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/* Flags for NOR specific configuration */
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#define SPI_NOR_USE_FSR BIT(0)
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#define SPI_NOR_USE_BANK BIT(1)
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struct nor_device {
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struct spi_mem_op read_op;
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uint32_t size;
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uint32_t flags;
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uint8_t selected_bank;
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uint8_t bank_write_cmd;
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uint8_t bank_read_cmd;
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};
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int spi_nor_read(unsigned int offset, uintptr_t buffer, size_t length,
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size_t *length_read);
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int spi_nor_init(unsigned long long *device_size, unsigned int *erase_size);
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/*
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* Platform can implement this to override default NOR instance configuration.
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*
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* @device: target NOR instance.
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* Return 0 on success, negative value otherwise.
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*/
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int plat_get_nor_data(struct nor_device *device);
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#endif /* DRIVERS_SPI_NOR_H */
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