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170 lines
5.3 KiB
170 lines
5.3 KiB
/*
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* Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STPMIC1_H
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#define STPMIC1_H
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#include <drivers/st/stm32_i2c.h>
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#include <lib/utils_def.h>
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#define TURN_ON_REG 0x1U
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#define TURN_OFF_REG 0x2U
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#define ICC_LDO_TURN_OFF_REG 0x3U
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#define ICC_BUCK_TURN_OFF_REG 0x4U
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#define RESET_STATUS_REG 0x5U
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#define VERSION_STATUS_REG 0x6U
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#define MAIN_CONTROL_REG 0x10U
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#define PADS_PULL_REG 0x11U
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#define BUCK_PULL_DOWN_REG 0x12U
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#define LDO14_PULL_DOWN_REG 0x13U
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#define LDO56_PULL_DOWN_REG 0x14U
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#define VIN_CONTROL_REG 0x15U
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#define PONKEY_TIMER_REG 0x16U
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#define MASK_RANK_BUCK_REG 0x17U
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#define MASK_RESET_BUCK_REG 0x18U
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#define MASK_RANK_LDO_REG 0x19U
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#define MASK_RESET_LDO_REG 0x1AU
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#define WATCHDOG_CONTROL_REG 0x1BU
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#define WATCHDOG_TIMER_REG 0x1CU
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#define BUCK_ICC_TURNOFF_REG 0x1DU
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#define LDO_ICC_TURNOFF_REG 0x1EU
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#define BUCK_APM_CONTROL_REG 0x1FU
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#define BUCK1_CONTROL_REG 0x20U
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#define BUCK2_CONTROL_REG 0x21U
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#define BUCK3_CONTROL_REG 0x22U
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#define BUCK4_CONTROL_REG 0x23U
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#define VREF_DDR_CONTROL_REG 0x24U
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#define LDO1_CONTROL_REG 0x25U
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#define LDO2_CONTROL_REG 0x26U
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#define LDO3_CONTROL_REG 0x27U
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#define LDO4_CONTROL_REG 0x28U
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#define LDO5_CONTROL_REG 0x29U
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#define LDO6_CONTROL_REG 0x2AU
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#define BUCK1_PWRCTRL_REG 0x30U
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#define BUCK2_PWRCTRL_REG 0x31U
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#define BUCK3_PWRCTRL_REG 0x32U
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#define BUCK4_PWRCTRL_REG 0x33U
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#define VREF_DDR_PWRCTRL_REG 0x34U
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#define LDO1_PWRCTRL_REG 0x35U
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#define LDO2_PWRCTRL_REG 0x36U
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#define LDO3_PWRCTRL_REG 0x37U
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#define LDO4_PWRCTRL_REG 0x38U
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#define LDO5_PWRCTRL_REG 0x39U
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#define LDO6_PWRCTRL_REG 0x3AU
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#define FREQUENCY_SPREADING_REG 0x3BU
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#define USB_CONTROL_REG 0x40U
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#define ITLATCH1_REG 0x50U
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#define ITLATCH2_REG 0x51U
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#define ITLATCH3_REG 0x52U
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#define ITLATCH4_REG 0x53U
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#define ITSETLATCH1_REG 0x60U
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#define ITSETLATCH2_REG 0x61U
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#define ITSETLATCH3_REG 0x62U
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#define ITSETLATCH4_REG 0x63U
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#define ITCLEARLATCH1_REG 0x70U
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#define ITCLEARLATCH2_REG 0x71U
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#define ITCLEARLATCH3_REG 0x72U
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#define ITCLEARLATCH4_REG 0x73U
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#define ITMASK1_REG 0x80U
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#define ITMASK2_REG 0x81U
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#define ITMASK3_REG 0x82U
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#define ITMASK4_REG 0x83U
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#define ITSETMASK1_REG 0x90U
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#define ITSETMASK2_REG 0x91U
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#define ITSETMASK3_REG 0x92U
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#define ITSETMASK4_REG 0x93U
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#define ITCLEARMASK1_REG 0xA0U
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#define ITCLEARMASK2_REG 0xA1U
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#define ITCLEARMASK3_REG 0xA2U
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#define ITCLEARMASK4_REG 0xA3U
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#define ITSOURCE1_REG 0xB0U
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#define ITSOURCE2_REG 0xB1U
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#define ITSOURCE3_REG 0xB2U
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#define ITSOURCE4_REG 0xB3U
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/* Registers masks */
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#define LDO_VOLTAGE_MASK 0x7CU
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#define BUCK_VOLTAGE_MASK 0xFCU
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#define LDO_BUCK_VOLTAGE_SHIFT 2
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#define LDO_BUCK_ENABLE_MASK 0x01U
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#define LDO_BUCK_HPLP_ENABLE_MASK 0x02U
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#define LDO_BUCK_HPLP_SHIFT 1
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#define LDO_BUCK_RANK_MASK 0x01U
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#define LDO_BUCK_RESET_MASK 0x01U
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#define LDO_BUCK_PULL_DOWN_MASK 0x03U
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/* Pull down register */
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#define BUCK1_PULL_DOWN_SHIFT 0
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#define BUCK2_PULL_DOWN_SHIFT 2
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#define BUCK3_PULL_DOWN_SHIFT 4
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#define BUCK4_PULL_DOWN_SHIFT 6
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#define VREF_DDR_PULL_DOWN_SHIFT 4
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/* Buck Mask reset register */
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#define BUCK1_MASK_RESET 0
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#define BUCK2_MASK_RESET 1
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#define BUCK3_MASK_RESET 2
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#define BUCK4_MASK_RESET 3
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/* LDO Mask reset register */
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#define LDO1_MASK_RESET 0
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#define LDO2_MASK_RESET 1
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#define LDO3_MASK_RESET 2
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#define LDO4_MASK_RESET 3
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#define LDO5_MASK_RESET 4
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#define LDO6_MASK_RESET 5
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#define VREF_DDR_MASK_RESET 6
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/* Main PMIC Control Register (MAIN_CONTROL_REG) */
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#define ICC_EVENT_ENABLED BIT(4)
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#define PWRCTRL_POLARITY_HIGH BIT(3)
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#define PWRCTRL_PIN_VALID BIT(2)
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#define RESTART_REQUEST_ENABLED BIT(1)
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#define SOFTWARE_SWITCH_OFF_ENABLED BIT(0)
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/* Main PMIC PADS Control Register (PADS_PULL_REG) */
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#define WAKEUP_DETECTOR_DISABLED BIT(4)
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#define PWRCTRL_PD_ACTIVE BIT(3)
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#define PWRCTRL_PU_ACTIVE BIT(2)
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#define WAKEUP_PD_ACTIVE BIT(1)
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#define PONKEY_PU_ACTIVE BIT(0)
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/* Main PMIC VINLOW Control Register (VIN_CONTROL_REGC DMSC) */
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#define SWIN_DETECTOR_ENABLED BIT(7)
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#define SWOUT_DETECTOR_ENABLED BIT(6)
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#define VINLOW_HYST_MASK 0x3
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#define VINLOW_HYST_SHIFT 4
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#define VINLOW_THRESHOLD_MASK 0x7
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#define VINLOW_THRESHOLD_SHIFT 1
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#define VINLOW_ENABLED 0x01
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#define VINLOW_CTRL_REG_MASK 0xFF
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/* USB Control Register */
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#define BOOST_OVP_DISABLED BIT(7)
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#define VBUS_OTG_DETECTION_DISABLED BIT(6)
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#define OCP_LIMIT_HIGH BIT(3)
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#define SWIN_SWOUT_ENABLED BIT(2)
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#define USBSW_OTG_SWITCH_ENABLED BIT(1)
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int stpmic1_powerctrl_on(void);
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int stpmic1_switch_off(void);
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int stpmic1_register_read(uint8_t register_id, uint8_t *value);
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int stpmic1_register_write(uint8_t register_id, uint8_t value);
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int stpmic1_register_update(uint8_t register_id, uint8_t value, uint8_t mask);
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int stpmic1_regulator_enable(const char *name);
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int stpmic1_regulator_disable(const char *name);
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uint8_t stpmic1_is_regulator_enabled(const char *name);
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int stpmic1_regulator_voltage_set(const char *name, uint16_t millivolts);
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int stpmic1_regulator_voltage_get(const char *name);
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int stpmic1_regulator_pull_down_set(const char *name);
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int stpmic1_regulator_mask_reset_set(const char *name);
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void stpmic1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr);
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int stpmic1_get_version(unsigned long *version);
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void stpmic1_dump_regulators(void);
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#endif /* STPMIC1_H */
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