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115 lines
3.7 KiB
115 lines
3.7 KiB
/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <drivers/arm/gicv2.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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/******************************************************************************
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* The following functions are defined as weak to allow a platform to override
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* the way the GICv2 driver is initialised and used.
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*****************************************************************************/
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#pragma weak plat_arm_gic_driver_init
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#pragma weak plat_arm_gic_init
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#pragma weak plat_arm_gic_cpuif_enable
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#pragma weak plat_arm_gic_cpuif_disable
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#pragma weak plat_arm_gic_pcpu_init
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/******************************************************************************
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* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
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* interrupts.
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*****************************************************************************/
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static const interrupt_prop_t arm_interrupt_props[] = {
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PLAT_ARM_G1S_IRQ_PROPS(GICV2_INTR_GROUP0),
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PLAT_ARM_G0_IRQ_PROPS(GICV2_INTR_GROUP0)
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};
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static unsigned int target_mask_array[PLATFORM_CORE_COUNT];
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static const gicv2_driver_data_t arm_gic_data = {
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.gicd_base = PLAT_ARM_GICD_BASE,
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.gicc_base = PLAT_ARM_GICC_BASE,
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.interrupt_props = arm_interrupt_props,
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.interrupt_props_num = ARRAY_SIZE(arm_interrupt_props),
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.target_masks = target_mask_array,
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.target_masks_num = ARRAY_SIZE(target_mask_array),
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};
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/******************************************************************************
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* ARM common helper to initialize the GICv2 only driver.
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*****************************************************************************/
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void plat_arm_gic_driver_init(void)
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{
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gicv2_driver_init(&arm_gic_data);
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}
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void plat_arm_gic_init(void)
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{
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gicv2_distif_init();
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gicv2_pcpu_distif_init();
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gicv2_set_pe_target_mask(plat_my_core_pos());
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gicv2_cpuif_enable();
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}
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/******************************************************************************
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* ARM common helper to enable the GICv2 CPU interface
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*****************************************************************************/
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void plat_arm_gic_cpuif_enable(void)
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{
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gicv2_cpuif_enable();
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}
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/******************************************************************************
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* ARM common helper to disable the GICv2 CPU interface
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*****************************************************************************/
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void plat_arm_gic_cpuif_disable(void)
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{
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gicv2_cpuif_disable();
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}
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/******************************************************************************
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* ARM common helper to initialize the per cpu distributor interface in GICv2
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*****************************************************************************/
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void plat_arm_gic_pcpu_init(void)
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{
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gicv2_pcpu_distif_init();
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gicv2_set_pe_target_mask(plat_my_core_pos());
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}
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/******************************************************************************
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* Stubs for Redistributor power management. Although GICv2 doesn't have
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* Redistributor interface, these are provided for the sake of uniform GIC API
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*****************************************************************************/
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void plat_arm_gic_redistif_on(void)
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{
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return;
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}
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void plat_arm_gic_redistif_off(void)
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{
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return;
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}
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/******************************************************************************
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* ARM common helper to save & restore the GICv3 on resume from system suspend.
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* The normal world currently takes care of saving and restoring the GICv2
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* registers due to legacy reasons. Hence we just initialize the Distributor
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* on resume from system suspend.
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*****************************************************************************/
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void plat_arm_gic_save(void)
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{
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return;
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}
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void plat_arm_gic_resume(void)
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{
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gicv2_distif_init();
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gicv2_pcpu_distif_init();
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}
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