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109 lines
3.6 KiB
109 lines
3.6 KiB
/*
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* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <platform_def.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <drivers/console.h>
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#include <drivers/generic_delay_timer.h>
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#include <drivers/ti/uart/uart_16550.h>
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#include <lib/mmio.h>
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#include <plat_private.h>
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#include <plat/common/platform.h>
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static entry_point_info_t bl32_ep_info;
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static entry_point_info_t bl33_ep_info;
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/*******************************************************************************
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* Return a pointer to the 'entry_point_info' structure of the next image for
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* the security state specified. BL33 corresponds to the non-secure image type
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* while BL32 corresponds to the secure image type. A NULL pointer is returned
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* if the image does not exist.
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******************************************************************************/
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entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
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{
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entry_point_info_t *next_image_info;
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next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
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/* None of the images on this platform can have 0x0 as the entrypoint */
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if (next_image_info->pc)
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return next_image_info;
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else
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return NULL;
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}
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#pragma weak params_early_setup
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void params_early_setup(u_register_t plat_param_from_bl2)
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{
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}
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/*******************************************************************************
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* Perform any BL3-1 early platform setup. Here is an opportunity to copy
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* parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before they
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* are lost (potentially). This needs to be done before the MMU is initialized
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* so that the memory layout can be used while creating page tables.
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* BL2 has flushed this information to memory, so we are guaranteed to pick up
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* good data.
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******************************************************************************/
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void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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u_register_t arg2, u_register_t arg3)
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{
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static console_t console;
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struct rockchip_bl31_params *arg_from_bl2 = (struct rockchip_bl31_params *) arg0;
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params_early_setup(arg1);
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if (rockchip_get_uart_base() != 0)
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console_16550_register(rockchip_get_uart_base(),
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rockchip_get_uart_clock(),
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rockchip_get_uart_baudrate(), &console);
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VERBOSE("bl31_setup\n");
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/* Passing a NULL context is a critical programming error */
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assert(arg_from_bl2);
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assert(arg_from_bl2->h.type == PARAM_BL31);
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assert(arg_from_bl2->h.version >= VERSION_1);
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bl32_ep_info = *arg_from_bl2->bl32_ep_info;
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bl33_ep_info = *arg_from_bl2->bl33_ep_info;
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}
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/*******************************************************************************
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* Perform any BL3-1 platform setup code
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******************************************************************************/
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void bl31_platform_setup(void)
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{
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generic_delay_timer_init();
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plat_rockchip_soc_init();
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/* Initialize the gic cpu and distributor interfaces */
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plat_rockchip_gic_driver_init();
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plat_rockchip_gic_init();
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plat_rockchip_pmu_init();
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}
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/*******************************************************************************
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* Perform the very early platform specific architectural setup here. At the
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* moment this is only intializes the mmu in a quick and dirty way.
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******************************************************************************/
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void bl31_plat_arch_setup(void)
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{
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plat_cci_init();
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plat_cci_enable();
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plat_configure_mmu_el3(BL_CODE_BASE,
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BL_COHERENT_RAM_END - BL_CODE_BASE,
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BL_CODE_BASE,
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BL_CODE_END,
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BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END);
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}
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