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292 lines
9.3 KiB
292 lines
9.3 KiB
// Copyright (c) 2017 Google Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "source/opt/propagator.h"
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namespace spvtools {
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namespace opt {
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void SSAPropagator::AddControlEdge(const Edge& edge) {
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BasicBlock* dest_bb = edge.dest;
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// Refuse to add the exit block to the work list.
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if (dest_bb == ctx_->cfg()->pseudo_exit_block()) {
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return;
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}
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// Try to mark the edge executable. If it was already in the set of
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// executable edges, do nothing.
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if (!MarkEdgeExecutable(edge)) {
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return;
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}
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// If the edge had not already been marked executable, add the destination
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// basic block to the work list.
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blocks_.push(dest_bb);
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}
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void SSAPropagator::AddSSAEdges(Instruction* instr) {
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// Ignore instructions that produce no result.
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if (instr->result_id() == 0) {
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return;
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}
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get_def_use_mgr()->ForEachUser(
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instr->result_id(), [this](Instruction* use_instr) {
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// If the basic block for |use_instr| has not been simulated yet, do
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// nothing. The instruction |use_instr| will be simulated next time the
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// block is scheduled.
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if (!BlockHasBeenSimulated(ctx_->get_instr_block(use_instr))) {
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return;
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}
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if (ShouldSimulateAgain(use_instr)) {
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ssa_edge_uses_.push(use_instr);
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}
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});
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}
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bool SSAPropagator::IsPhiArgExecutable(Instruction* phi, uint32_t i) const {
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BasicBlock* phi_bb = ctx_->get_instr_block(phi);
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uint32_t in_label_id = phi->GetSingleWordOperand(i + 1);
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Instruction* in_label_instr = get_def_use_mgr()->GetDef(in_label_id);
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BasicBlock* in_bb = ctx_->get_instr_block(in_label_instr);
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return IsEdgeExecutable(Edge(in_bb, phi_bb));
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}
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bool SSAPropagator::SetStatus(Instruction* inst, PropStatus status) {
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bool has_old_status = false;
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PropStatus old_status = kVarying;
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if (HasStatus(inst)) {
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has_old_status = true;
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old_status = Status(inst);
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}
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assert((!has_old_status || old_status <= status) &&
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"Invalid lattice transition");
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bool status_changed = !has_old_status || (old_status != status);
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if (status_changed) statuses_[inst] = status;
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return status_changed;
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}
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bool SSAPropagator::Simulate(Instruction* instr) {
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bool changed = false;
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// Don't bother visiting instructions that should not be simulated again.
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if (!ShouldSimulateAgain(instr)) {
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return changed;
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}
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BasicBlock* dest_bb = nullptr;
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PropStatus status = visit_fn_(instr, &dest_bb);
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bool status_changed = SetStatus(instr, status);
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if (status == kVarying) {
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// The statement produces a varying result, add it to the list of statements
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// not to simulate anymore and add its SSA def-use edges for simulation.
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DontSimulateAgain(instr);
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if (status_changed) {
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AddSSAEdges(instr);
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}
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// If |instr| is a block terminator, add all the control edges out of its
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// block.
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if (instr->IsBlockTerminator()) {
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BasicBlock* block = ctx_->get_instr_block(instr);
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for (const auto& e : bb_succs_.at(block)) {
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AddControlEdge(e);
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}
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}
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return false;
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} else if (status == kInteresting) {
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// Add the SSA edges coming out of this instruction if the propagation
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// status has changed.
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if (status_changed) {
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AddSSAEdges(instr);
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}
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// If there are multiple outgoing control flow edges and we know which one
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// will be taken, add the destination block to the CFG work list.
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if (dest_bb) {
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AddControlEdge(Edge(ctx_->get_instr_block(instr), dest_bb));
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}
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changed = true;
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}
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// At this point, we are dealing with instructions that are in status
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// kInteresting or kNotInteresting. To decide whether this instruction should
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// be simulated again, we examine its operands. If at least one operand O is
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// defined at an instruction D that should be simulated again, then the output
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// of D might affect |instr|, so we should simulate |instr| again.
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bool has_operands_to_simulate = false;
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if (instr->opcode() == SpvOpPhi) {
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// For Phi instructions, an operand causes the Phi to be simulated again if
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// the operand comes from an edge that has not yet been traversed or if its
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// definition should be simulated again.
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for (uint32_t i = 2; i < instr->NumOperands(); i += 2) {
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// Phi arguments come in pairs. Index 'i' contains the
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// variable id, index 'i + 1' is the originating block id.
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assert(i % 2 == 0 && i < instr->NumOperands() - 1 &&
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"malformed Phi arguments");
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uint32_t arg_id = instr->GetSingleWordOperand(i);
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Instruction* arg_def_instr = get_def_use_mgr()->GetDef(arg_id);
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if (!IsPhiArgExecutable(instr, i) || ShouldSimulateAgain(arg_def_instr)) {
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has_operands_to_simulate = true;
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break;
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}
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}
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} else {
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// For regular instructions, check if the defining instruction of each
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// operand needs to be simulated again. If so, then this instruction should
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// also be simulated again.
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has_operands_to_simulate =
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!instr->WhileEachInId([this](const uint32_t* use) {
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Instruction* def_instr = get_def_use_mgr()->GetDef(*use);
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if (ShouldSimulateAgain(def_instr)) {
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return false;
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}
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return true;
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});
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}
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if (!has_operands_to_simulate) {
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DontSimulateAgain(instr);
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}
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return changed;
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}
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bool SSAPropagator::Simulate(BasicBlock* block) {
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if (block == ctx_->cfg()->pseudo_exit_block()) {
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return false;
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}
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// Always simulate Phi instructions, even if we have simulated this block
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// before. We do this because Phi instructions receive their inputs from
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// incoming edges. When those edges are marked executable, the corresponding
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// operand can be simulated.
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bool changed = false;
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block->ForEachPhiInst(
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[&changed, this](Instruction* instr) { changed |= Simulate(instr); });
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// If this is the first time this block is being simulated, simulate every
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// statement in it.
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if (!BlockHasBeenSimulated(block)) {
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block->ForEachInst([this, &changed](Instruction* instr) {
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if (instr->opcode() != SpvOpPhi) {
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changed |= Simulate(instr);
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}
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});
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MarkBlockSimulated(block);
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// If this block has exactly one successor, mark the edge to its successor
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// as executable.
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if (bb_succs_.at(block).size() == 1) {
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AddControlEdge(bb_succs_.at(block).at(0));
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}
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}
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return changed;
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}
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void SSAPropagator::Initialize(Function* fn) {
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// Compute predecessor and successor blocks for every block in |fn|'s CFG.
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// TODO(dnovillo): Move this to CFG and always build them. Alternately,
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// move it to IRContext and build CFG preds/succs on-demand.
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bb_succs_[ctx_->cfg()->pseudo_entry_block()].push_back(
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Edge(ctx_->cfg()->pseudo_entry_block(), fn->entry().get()));
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for (auto& block : *fn) {
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const auto& const_block = block;
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const_block.ForEachSuccessorLabel([this, &block](const uint32_t label_id) {
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BasicBlock* succ_bb =
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ctx_->get_instr_block(get_def_use_mgr()->GetDef(label_id));
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bb_succs_[&block].push_back(Edge(&block, succ_bb));
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bb_preds_[succ_bb].push_back(Edge(succ_bb, &block));
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});
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if (block.IsReturnOrAbort()) {
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bb_succs_[&block].push_back(
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Edge(&block, ctx_->cfg()->pseudo_exit_block()));
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bb_preds_[ctx_->cfg()->pseudo_exit_block()].push_back(
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Edge(ctx_->cfg()->pseudo_exit_block(), &block));
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}
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}
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// Add the edges out of the entry block to seed the propagator.
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const auto& entry_succs = bb_succs_[ctx_->cfg()->pseudo_entry_block()];
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for (const auto& e : entry_succs) {
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AddControlEdge(e);
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}
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}
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bool SSAPropagator::Run(Function* fn) {
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Initialize(fn);
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bool changed = false;
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while (!blocks_.empty() || !ssa_edge_uses_.empty()) {
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// Simulate all blocks first. Simulating blocks will add SSA edges to
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// follow after all the blocks have been simulated.
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if (!blocks_.empty()) {
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auto block = blocks_.front();
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changed |= Simulate(block);
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blocks_.pop();
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continue;
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}
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// Simulate edges from the SSA queue.
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if (!ssa_edge_uses_.empty()) {
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Instruction* instr = ssa_edge_uses_.front();
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changed |= Simulate(instr);
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ssa_edge_uses_.pop();
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}
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}
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#ifndef NDEBUG
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// Verify all visited values have settled. No value that has been simulated
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// should end on not interesting.
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fn->ForEachInst([this](Instruction* inst) {
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assert(
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(!HasStatus(inst) || Status(inst) != SSAPropagator::kNotInteresting) &&
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"Unsettled value");
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});
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#endif
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return changed;
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}
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std::ostream& operator<<(std::ostream& str,
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const SSAPropagator::PropStatus& status) {
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switch (status) {
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case SSAPropagator::kVarying:
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str << "Varying";
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break;
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case SSAPropagator::kInteresting:
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str << "Interesting";
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break;
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default:
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str << "Not interesting";
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break;
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}
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return str;
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}
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} // namespace opt
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} // namespace spvtools
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