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689 lines
15 KiB
689 lines
15 KiB
/*
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* Copyright © 2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Ben Widawsky <ben@bwidawsk.net>
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* Jeff McGee <jeff.mcgee@intel.com>
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*
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <signal.h>
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#include <errno.h>
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#include <time.h>
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#include <sys/wait.h>
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#include "igt.h"
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#include "igt_dummyload.h"
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#include "igt_sysfs.h"
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IGT_TEST_DESCRIPTION("Render P-States tests - verify GPU frequency changes");
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static int drm_fd;
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enum {
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CUR,
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MIN,
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MAX,
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RP0,
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RP1,
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RPn,
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BOOST,
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NUMFREQ
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};
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static int origfreqs[NUMFREQ];
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struct sysfs_file {
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const char *name;
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const char *mode;
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FILE *filp;
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} sysfs_files[] = {
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{ "cur", "r", NULL },
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{ "min", "rb+", NULL },
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{ "max", "rb+", NULL },
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{ "RP0", "r", NULL },
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{ "RP1", "r", NULL },
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{ "RPn", "r", NULL },
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{ "boost", "rb+", NULL },
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{ NULL, NULL, NULL }
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};
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static int readval(FILE *filp)
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{
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int val;
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int scanned;
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rewind(filp);
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scanned = fscanf(filp, "%d", &val);
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igt_assert_eq(scanned, 1);
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return val;
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}
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static void read_freqs(int *freqs)
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{
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int i;
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for (i = 0; i < NUMFREQ; i++)
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freqs[i] = readval(sysfs_files[i].filp);
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}
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static void nsleep(unsigned long ns)
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{
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struct timespec ts;
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int ret;
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ts.tv_sec = 0;
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ts.tv_nsec = ns;
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do {
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struct timespec rem;
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ret = nanosleep(&ts, &rem);
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igt_assert(ret == 0 || errno == EINTR);
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ts = rem;
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} while (ret && errno == EINTR);
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}
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static void wait_freq_settle(void)
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{
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int timeout = 10;
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while (1) {
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int freqs[NUMFREQ];
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read_freqs(freqs);
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if (freqs[CUR] >= freqs[MIN] && freqs[CUR] <= freqs[MAX])
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break;
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nsleep(1000000);
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if (!timeout--)
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break;
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}
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}
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static int do_writeval(FILE *filp, int val, int lerrno, bool readback_check)
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{
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int ret, orig;
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orig = readval(filp);
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rewind(filp);
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ret = fprintf(filp, "%d", val);
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if (lerrno) {
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/* Expecting specific error */
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igt_assert(ret == EOF && errno == lerrno);
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if (readback_check)
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igt_assert_eq(readval(filp), orig);
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} else {
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/* Expecting no error */
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igt_assert_lt(0, ret);
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wait_freq_settle();
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if (readback_check)
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igt_assert_eq(readval(filp), val);
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}
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return ret;
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}
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#define writeval(filp, val) do_writeval(filp, val, 0, true)
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#define writeval_inval(filp, val) do_writeval(filp, val, EINVAL, true)
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#define writeval_nocheck(filp, val) do_writeval(filp, val, 0, false)
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static void check_freq_constraints(const int *freqs)
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{
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igt_assert_lte(freqs[MIN], freqs[MAX]);
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igt_assert_lte(freqs[CUR], freqs[MAX]);
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igt_assert_lte(freqs[RPn], freqs[CUR]);
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igt_assert_lte(freqs[RPn], freqs[MIN]);
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igt_assert_lte(freqs[MAX], freqs[RP0]);
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igt_assert_lte(freqs[RP1], freqs[RP0]);
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igt_assert_lte(freqs[RPn], freqs[RP1]);
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igt_assert_neq(freqs[RP0], 0);
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igt_assert_neq(freqs[RP1], 0);
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}
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static void dump(const int *freqs)
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{
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int i;
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igt_debug("gt freq (MHz):");
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for (i = 0; i < NUMFREQ; i++)
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igt_debug(" %s=%d", sysfs_files[i].name, freqs[i]);
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igt_debug("\n");
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}
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enum load {
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LOW = 0,
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HIGH
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};
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static struct load_helper {
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int link;
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enum load load;
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bool exit;
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bool signal;
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struct igt_helper_process igt_proc;
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} lh;
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static void load_helper_signal_handler(int sig)
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{
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if (sig == SIGUSR2) {
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lh.load = !lh.load;
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lh.signal = true;
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igt_debug("Switching background load to %s\n", lh.load ? "high" : "low");
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} else
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lh.exit = true;
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}
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static void load_helper_sync(void)
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{
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bool dummy;
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igt_assert_eq(read(lh.link, &dummy, sizeof(dummy)), sizeof(dummy));
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}
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#define LOAD_HELPER_PAUSE_USEC 500
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#define LOAD_HELPER_BO_SIZE (16*1024*1024)
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static void load_helper_set_load(enum load load)
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{
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igt_assert(lh.igt_proc.running);
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if (lh.load == load)
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return;
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lh.load = load;
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kill(lh.igt_proc.pid, SIGUSR2);
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/* wait for load-helper to switch */
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load_helper_sync();
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}
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static void load_helper_run(enum load load)
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{
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int link[2];
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/*
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* FIXME fork helpers won't get cleaned up when started from within a
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* subtest, so handle the case where it sticks around a bit too long.
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*/
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if (lh.igt_proc.running) {
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load_helper_set_load(load);
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return;
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}
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igt_require_gem(drm_fd);
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lh.exit = false;
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lh.load = load;
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lh.signal = true;
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pipe(link);
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lh.link = link[1];
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igt_fork_helper(&lh.igt_proc) {
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igt_spin_t *spin[2] = {};
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bool prev_load;
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uint32_t handle;
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signal(SIGUSR1, load_helper_signal_handler);
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signal(SIGUSR2, load_helper_signal_handler);
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igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
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prev_load = lh.load == HIGH;
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spin[0] = __igt_spin_new(drm_fd);
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if (prev_load)
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spin[1] = __igt_spin_new(drm_fd);
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prev_load = !prev_load; /* send the initial signal */
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while (!lh.exit) {
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bool high_load;
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handle = spin[0]->handle;
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igt_spin_end(spin[0]);
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while (gem_bo_busy(drm_fd, handle))
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usleep(100);
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igt_spin_free(drm_fd, spin[0]);
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usleep(100);
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high_load = lh.load == HIGH;
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if (!high_load && spin[1]) {
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igt_spin_free(drm_fd, spin[1]);
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spin[1] = NULL;
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} else {
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spin[0] = spin[1];
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}
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spin[high_load] = __igt_spin_new(drm_fd);
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if (lh.signal && high_load != prev_load) {
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write(lh.link, &lh.signal, sizeof(lh.signal));
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lh.signal = false;
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}
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prev_load = high_load;
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}
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handle = spin[0]->handle;
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igt_spin_end(spin[0]);
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if (spin[1]) {
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handle = spin[1]->handle;
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igt_spin_end(spin[1]);
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}
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/* Wait for completion without boosting */
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usleep(1000);
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while (gem_bo_busy(drm_fd, handle))
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usleep(1000);
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/*
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* Idle/boost logic is tied with request retirement.
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* Speed up detection of idle state and ensure deboost
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* after removing load.
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*/
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igt_drop_caches_set(drm_fd, DROP_RETIRE);
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igt_spin_free(drm_fd, spin[1]);
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igt_spin_free(drm_fd, spin[0]);
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}
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close(lh.link);
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lh.link = link[0];
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/* wait for our helper to complete its first round */
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load_helper_sync();
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}
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static void load_helper_stop(void)
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{
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kill(lh.igt_proc.pid, SIGUSR1);
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igt_assert(igt_wait_helper(&lh.igt_proc) == 0);
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}
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static void do_load_gpu(void)
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{
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load_helper_run(LOW);
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nsleep(10000000);
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load_helper_stop();
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}
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/* Return a frequency rounded by HW to the nearest supported value */
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static int get_hw_rounded_freq(int target)
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{
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int freqs[NUMFREQ];
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int old_freq;
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int idx;
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int ret;
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read_freqs(freqs);
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if (freqs[MIN] > target)
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idx = MIN;
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else
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idx = MAX;
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old_freq = freqs[idx];
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writeval_nocheck(sysfs_files[idx].filp, target);
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read_freqs(freqs);
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ret = freqs[idx];
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writeval_nocheck(sysfs_files[idx].filp, old_freq);
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return ret;
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}
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/*
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* Modify softlimit MIN and MAX freqs to valid and invalid levels. Depending
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* on subtest run different check after each modification.
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*/
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static void min_max_config(void (*check)(void), bool load_gpu)
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{
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int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
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/*
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* hw (and so kernel) rounds to the nearest value supported by
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* the given platform.
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*/
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fmid = get_hw_rounded_freq(fmid);
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igt_debug("\nCheck original min and max...\n");
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if (load_gpu)
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do_load_gpu();
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check();
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igt_debug("\nSet min=RPn and max=RP0...\n");
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writeval(sysfs_files[MIN].filp, origfreqs[RPn]);
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writeval(sysfs_files[MAX].filp, origfreqs[RP0]);
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if (load_gpu)
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do_load_gpu();
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check();
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igt_debug("\nIncrease min to midpoint...\n");
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writeval(sysfs_files[MIN].filp, fmid);
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if (load_gpu)
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do_load_gpu();
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check();
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igt_debug("\nIncrease min to RP0...\n");
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writeval(sysfs_files[MIN].filp, origfreqs[RP0]);
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if (load_gpu)
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do_load_gpu();
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check();
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igt_debug("\nIncrease min above RP0 (invalid)...\n");
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writeval_inval(sysfs_files[MIN].filp, origfreqs[RP0] + 1000);
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check();
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igt_debug("\nDecrease max to RPn (invalid)...\n");
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writeval_inval(sysfs_files[MAX].filp, origfreqs[RPn]);
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check();
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igt_debug("\nDecrease min to midpoint...\n");
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writeval(sysfs_files[MIN].filp, fmid);
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if (load_gpu)
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do_load_gpu();
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check();
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igt_debug("\nDecrease min to RPn...\n");
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writeval(sysfs_files[MIN].filp, origfreqs[RPn]);
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if (load_gpu)
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do_load_gpu();
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check();
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igt_debug("\nDecrease min below RPn (invalid)...\n");
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writeval_inval(sysfs_files[MIN].filp, 0);
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check();
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igt_debug("\nDecrease max to midpoint...\n");
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writeval(sysfs_files[MAX].filp, fmid);
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check();
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igt_debug("\nDecrease max to RPn...\n");
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writeval(sysfs_files[MAX].filp, origfreqs[RPn]);
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check();
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igt_debug("\nDecrease max below RPn (invalid)...\n");
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writeval_inval(sysfs_files[MAX].filp, 0);
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check();
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igt_debug("\nIncrease min to RP0 (invalid)...\n");
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writeval_inval(sysfs_files[MIN].filp, origfreqs[RP0]);
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check();
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igt_debug("\nIncrease max to midpoint...\n");
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writeval(sysfs_files[MAX].filp, fmid);
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check();
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igt_debug("\nIncrease max to RP0...\n");
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writeval(sysfs_files[MAX].filp, origfreqs[RP0]);
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check();
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igt_debug("\nIncrease max above RP0 (invalid)...\n");
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writeval_inval(sysfs_files[MAX].filp, origfreqs[RP0] + 1000);
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check();
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writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
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writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
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}
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static void basic_check(void)
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{
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int freqs[NUMFREQ];
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read_freqs(freqs);
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dump(freqs);
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check_freq_constraints(freqs);
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}
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#define IDLE_WAIT_TIMESTEP_MSEC 250
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#define IDLE_WAIT_TIMEOUT_MSEC 2500
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static void idle_check(void)
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{
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int freqs[NUMFREQ];
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int wait = 0;
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/* Monitor frequencies until cur settles down to min, which should
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* happen within the allotted time */
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do {
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read_freqs(freqs);
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dump(freqs);
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check_freq_constraints(freqs);
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if (freqs[CUR] == freqs[RPn])
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break;
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usleep(1000 * IDLE_WAIT_TIMESTEP_MSEC);
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wait += IDLE_WAIT_TIMESTEP_MSEC;
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} while (wait < IDLE_WAIT_TIMEOUT_MSEC);
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igt_debugfs_dump(drm_fd, "i915_rps_boost_info");
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igt_assert_eq(freqs[CUR], freqs[RPn]);
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igt_debug("Required %d msec to reach cur=idle\n", wait);
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}
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#define LOADED_WAIT_TIMESTEP_MSEC 100
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#define LOADED_WAIT_TIMEOUT_MSEC 3000
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static void loaded_check(void)
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{
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int freqs[NUMFREQ];
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int wait = 0;
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/* Monitor frequencies until cur increases to max, which should
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* happen within the allotted time */
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do {
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read_freqs(freqs);
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dump(freqs);
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check_freq_constraints(freqs);
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if (freqs[CUR] >= freqs[MAX])
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break;
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usleep(1000 * LOADED_WAIT_TIMESTEP_MSEC);
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wait += LOADED_WAIT_TIMESTEP_MSEC;
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} while (wait < LOADED_WAIT_TIMEOUT_MSEC);
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igt_debugfs_dump(drm_fd, "i915_rps_boost_info");
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igt_assert_lte(freqs[MAX], freqs[CUR]);
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igt_debug("Required %d msec to reach cur=max\n", wait);
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}
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#define STABILIZE_WAIT_TIMESTEP_MSEC 250
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#define STABILIZE_WAIT_TIMEOUT_MSEC 15000
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static void stabilize_check(int *out)
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{
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int freqs[NUMFREQ];
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int wait = 0;
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/* Monitor frequencies until HW will stabilize cur frequency.
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* It should happen within allotted time */
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read_freqs(freqs);
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dump(freqs);
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usleep(1000 * STABILIZE_WAIT_TIMESTEP_MSEC);
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do {
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read_freqs(out);
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dump(out);
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if (memcmp(freqs, out, sizeof(freqs)) == 0)
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break;
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memcpy(freqs, out, sizeof(freqs));
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wait += STABILIZE_WAIT_TIMESTEP_MSEC;
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} while (wait < STABILIZE_WAIT_TIMEOUT_MSEC);
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igt_debugfs_dump(drm_fd, "i915_rps_boost_info");
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igt_debug("Waited %d msec to stabilize cur\n", wait);
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}
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static void resubmit_batch(int fd, uint32_t handle, int count)
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{
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struct drm_i915_gem_exec_object2 obj = {
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.handle = handle
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};
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struct drm_i915_gem_execbuffer2 eb = {
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.buffer_count = 1,
|
|
.buffers_ptr = to_user_pointer(&obj),
|
|
};
|
|
while (count--)
|
|
gem_execbuf(fd, &eb);
|
|
}
|
|
|
|
static void boost_freq(int fd, int *boost_freqs)
|
|
{
|
|
int64_t timeout = 1;
|
|
igt_spin_t *load;
|
|
|
|
load = igt_spin_new(fd);
|
|
resubmit_batch(fd, load->handle, 16);
|
|
|
|
/* Waiting will grant us a boost to maximum */
|
|
gem_wait(fd, load->handle, &timeout);
|
|
|
|
read_freqs(boost_freqs);
|
|
dump(boost_freqs);
|
|
|
|
/* Avoid downlocking till boost request is pending */
|
|
igt_spin_end(load);
|
|
gem_sync(fd, load->handle);
|
|
igt_spin_free(fd, load);
|
|
}
|
|
|
|
static void waitboost(int fd, bool reset)
|
|
{
|
|
int pre_freqs[NUMFREQ];
|
|
int boost_freqs[NUMFREQ];
|
|
int post_freqs[NUMFREQ];
|
|
int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
|
|
fmid = get_hw_rounded_freq(fmid);
|
|
|
|
load_helper_run(LOW);
|
|
|
|
igt_debug("Apply low load...\n");
|
|
sleep(1);
|
|
stabilize_check(pre_freqs);
|
|
|
|
if (reset) {
|
|
igt_debug("Reset gpu...\n");
|
|
igt_force_gpu_reset(fd);
|
|
sleep(1);
|
|
}
|
|
|
|
/* Set max freq to less than boost freq */
|
|
writeval(sysfs_files[MAX].filp, fmid);
|
|
|
|
/* When we wait upon the GPU, we want to temporarily boost it
|
|
* to maximum.
|
|
*/
|
|
boost_freq(fd, boost_freqs);
|
|
|
|
/* Set max freq to original softmax */
|
|
writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
|
|
|
|
igt_debug("Apply low load again...\n");
|
|
sleep(1);
|
|
stabilize_check(post_freqs);
|
|
|
|
igt_debug("Removing load...\n");
|
|
load_helper_stop();
|
|
idle_check();
|
|
|
|
igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
|
|
igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
|
|
igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
|
|
}
|
|
|
|
static void pm_rps_exit_handler(int sig)
|
|
{
|
|
if (origfreqs[MIN] > readval(sysfs_files[MAX].filp)) {
|
|
writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
|
|
writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
|
|
} else {
|
|
writeval(sysfs_files[MIN].filp, origfreqs[MIN]);
|
|
writeval(sysfs_files[MAX].filp, origfreqs[MAX]);
|
|
}
|
|
|
|
if (lh.igt_proc.running)
|
|
load_helper_stop();
|
|
|
|
close(drm_fd);
|
|
}
|
|
|
|
igt_main
|
|
{
|
|
igt_skip_on_simulation();
|
|
|
|
igt_fixture {
|
|
struct sysfs_file *sysfs_file = sysfs_files;
|
|
char sysfs_path[80];
|
|
int ret;
|
|
|
|
/* Use drm_open_driver to verify device existence */
|
|
drm_fd = drm_open_driver(DRIVER_INTEL);
|
|
igt_require_gem(drm_fd);
|
|
igt_require(gem_can_store_dword(drm_fd, 0));
|
|
igt_assert(igt_sysfs_path(drm_fd, sysfs_path,
|
|
sizeof(sysfs_path)));
|
|
|
|
do {
|
|
int val = -1;
|
|
char *path;
|
|
|
|
ret = asprintf(&path, "%s/gt_%s_freq_mhz",
|
|
sysfs_path, sysfs_file->name);
|
|
igt_assert(ret != -1);
|
|
sysfs_file->filp = fopen(path, sysfs_file->mode);
|
|
igt_require(sysfs_file->filp);
|
|
setbuf(sysfs_file->filp, NULL);
|
|
|
|
val = readval(sysfs_file->filp);
|
|
igt_assert(val >= 0);
|
|
sysfs_file++;
|
|
} while (sysfs_file->name != NULL);
|
|
|
|
read_freqs(origfreqs);
|
|
|
|
igt_install_exit_handler(pm_rps_exit_handler);
|
|
}
|
|
|
|
igt_subtest("basic-api")
|
|
min_max_config(basic_check, false);
|
|
|
|
/* Verify the constraints, check if we can reach idle */
|
|
igt_subtest("min-max-config-idle")
|
|
min_max_config(idle_check, true);
|
|
|
|
/* Verify the constraints with high load, check if we can reach max */
|
|
igt_subtest("min-max-config-loaded") {
|
|
load_helper_run(HIGH);
|
|
min_max_config(loaded_check, false);
|
|
load_helper_stop();
|
|
}
|
|
|
|
/* Checks if we achieve boost using gem_wait */
|
|
igt_subtest("waitboost")
|
|
waitboost(drm_fd, false);
|
|
|
|
/* Test boost frequency after GPU reset */
|
|
igt_subtest("reset") {
|
|
igt_hang_t hang = igt_allow_hang(drm_fd, 0, 0);
|
|
waitboost(drm_fd, true);
|
|
igt_disallow_hang(drm_fd, hang);
|
|
}
|
|
}
|