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763 lines
26 KiB
763 lines
26 KiB
/*
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* Copyright (C) 2017 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* Tests a very simple end to end T=1 using the echo backend.
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*/
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#include <string.h>
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#include <vector>
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#include <gtest/gtest.h>
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#include <ese/ese.h>
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#include <ese/teq1.h>
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#define LOG_TAG "TEQ1_UNITTESTS"
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#include <ese/log.h>
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#include "ese_operations_interface.h"
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#include "ese_operations_wrapper.h"
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#include "teq1_private.h"
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#define UNUSED(x) UNUSED_ ## x __attribute__((__unused__))
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using ::testing::Test;
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// TODO:
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// - Unittests of each function
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// - teq1_rules matches Annex A of ISO 7816-3
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// Tests teq1_frame_error_check to avoid testing every combo that
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// ends in 255 in the rule engine.
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class Teq1FrameErrorCheck : public virtual Test {
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public:
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Teq1FrameErrorCheck() { }
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virtual ~Teq1FrameErrorCheck() { }
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struct Teq1Frame tx_frame_, rx_frame_;
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struct Teq1State state_;
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struct Teq1CardState card_state_;
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};
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TEST_F(Teq1FrameErrorCheck, info_parity) {
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static const uint8_t kRxPCBs[] = {
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TEQ1_I(0, 0),
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TEQ1_I(1, 0),
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TEQ1_I(0, 1),
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TEQ1_I(1, 1),
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255,
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};
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const uint8_t *pcb = &kRxPCBs[0];
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/* The PCBs above are all valid for a sent unchained I block with advancing
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* sequence #s.
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*/
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tx_frame_.header.PCB = TEQ1_I(0, 0);
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state_.card_state = &card_state_;
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state_.card_state->seq.card = 1;
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while (*pcb != 255) {
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rx_frame_.header.PCB = *pcb;
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rx_frame_.header.LEN = 2;
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rx_frame_.INF[0] = 'A';
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rx_frame_.INF[1] = 'B';
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rx_frame_.INF[2] = teq1_compute_LRC(&rx_frame_);
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EXPECT_EQ(0, teq1_frame_error_check(&state_, &tx_frame_, &rx_frame_)) << teq1_pcb_to_name(rx_frame_.header.PCB);
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rx_frame_.INF[2] = teq1_compute_LRC(&rx_frame_) - 1;
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// Reset so we check the LRC error instead of a wrong seq.
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state_.card_state->seq.card = !state_.card_state->seq.card;
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EXPECT_EQ(TEQ1_R(0, 0, 1), teq1_frame_error_check(&state_, &tx_frame_, &rx_frame_));
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state_.card_state->seq.card = !state_.card_state->seq.card;
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pcb++;
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}
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};
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TEST_F(Teq1FrameErrorCheck, length_mismatch) {
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};
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TEST_F(Teq1FrameErrorCheck, unchained_r_block) {
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};
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TEST_F(Teq1FrameErrorCheck, unexpected_seq) {
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};
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class Teq1RulesTest : public virtual Test {
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public:
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Teq1RulesTest() :
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tx_data_(INF_LEN, 'A'),
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rx_data_(INF_LEN, 'B'),
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tx_sg_({ .base = tx_data_.data(), .len = INF_LEN }),
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rx_sg_({ .base = rx_data_.data(), .len = INF_LEN }),
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card_state_({ .seq = { .card = 1, .interface = 1, }, }),
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state_(TEQ1_INIT_STATE(&tx_sg_, 1, INF_LEN,
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&rx_sg_, 1, INF_LEN,
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&card_state_)) {
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memset(&tx_frame_, 0, sizeof(struct Teq1Frame));
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memset(&tx_next_, 0, sizeof(struct Teq1Frame));
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memset(&rx_frame_, 0, sizeof(struct Teq1Frame));
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}
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virtual ~Teq1RulesTest() { }
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virtual void SetUp() {}
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virtual void TearDown() { }
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struct Teq1Frame tx_frame_;
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struct Teq1Frame tx_next_;
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struct Teq1Frame rx_frame_;
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std::vector<uint8_t> tx_data_;
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std::vector<uint8_t> rx_data_;
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struct EseSgBuffer tx_sg_;
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struct EseSgBuffer rx_sg_;
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struct Teq1CardState card_state_;
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struct Teq1State state_;
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};
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class Teq1ErrorFreeTest : public Teq1RulesTest {
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};
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class Teq1ErrorHandlingTest : public Teq1RulesTest {
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};
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class Teq1CompleteTest : public Teq1ErrorFreeTest {
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public:
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virtual void SetUp() {
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tx_frame_.header.PCB = TEQ1_I(0, 0);
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teq1_fill_info_block(&state_, &tx_frame_);
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// Check that the tx_data was fully consumed.
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EXPECT_EQ(0UL, state_.app_data.tx_total);
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rx_frame_.header.PCB = TEQ1_I(0, 0);
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rx_frame_.header.LEN = INF_LEN;
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ASSERT_EQ(static_cast<unsigned long>(INF_LEN), tx_data_.size()); // Catch fixture changes.
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// Supply TX data and make sure it overwrites RX data on consumption.
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memcpy(rx_frame_.INF, tx_data_.data(), INF_LEN);
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rx_frame_.INF[INF_LEN] = teq1_compute_LRC(&rx_frame_);
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}
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virtual void RunRules() {
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teq1_trace_header();
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teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
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teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
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enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
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EXPECT_EQ(0, state_.errors);
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EXPECT_EQ(NULL, state_.last_error_message)
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<< "Last error: " << state_.last_error_message;
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EXPECT_EQ(0, tx_next_.header.PCB)
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<< "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
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EXPECT_EQ(kRuleResultComplete, result)
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<< "Actual result name: " << teq1_rule_result_to_name(result);
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}
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};
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TEST_F(Teq1CompleteTest, I00_I00_empty) {
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// No data.
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state_.app_data.tx_total = 0;
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state_.app_data.rx_total = 0;
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// Re-zero the prepared frames.
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teq1_fill_info_block(&state_, &tx_frame_);
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rx_frame_.header.LEN = 0;
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rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
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RunRules();
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EXPECT_EQ(0U, rx_frame_.header.LEN);
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};
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TEST_F(Teq1CompleteTest, I00_I00_data) {
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RunRules();
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// Ensure that the rx_frame data was copied out to rx_data.
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EXPECT_EQ(0UL, state_.app_data.rx_total);
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EXPECT_EQ(tx_data_, rx_data_);
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};
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TEST_F(Teq1CompleteTest, I10_I10_data) {
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tx_frame_.header.PCB = TEQ1_I(1, 0);
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rx_frame_.header.PCB = TEQ1_I(0, 0);
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rx_frame_.INF[INF_LEN] = teq1_compute_LRC(&rx_frame_);
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RunRules();
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// Ensure that the rx_frame data was copied out to rx_data.
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EXPECT_EQ(INF_LEN, rx_frame_.header.LEN);
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EXPECT_EQ(0UL, state_.app_data.rx_total);
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EXPECT_EQ(tx_data_, rx_data_);
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};
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// Note, IFS is not tested as it is not supported on current hardware.
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TEST_F(Teq1ErrorFreeTest, I00_WTX0_WTX1_data) {
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tx_frame_.header.PCB = TEQ1_I(0, 0);
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teq1_fill_info_block(&state_, &tx_frame_);
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// Check that the tx_data was fully consumed.
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EXPECT_EQ(0UL, state_.app_data.tx_total);
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rx_frame_.header.PCB = TEQ1_S_WTX(0);
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rx_frame_.header.LEN = 1;
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rx_frame_.INF[0] = 2; /* Wait x 2 */
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rx_frame_.INF[1] = teq1_compute_LRC(&rx_frame_);
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teq1_trace_header();
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teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
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teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
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enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
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teq1_trace_transmit(tx_next_.header.PCB, tx_next_.header.LEN);
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EXPECT_EQ(0, state_.errors);
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EXPECT_EQ(NULL, state_.last_error_message)
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<< "Last error: " << state_.last_error_message;
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EXPECT_EQ(TEQ1_S_WTX(1), tx_next_.header.PCB)
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<< "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
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EXPECT_EQ(state_.wait_mult, 2);
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EXPECT_EQ(state_.wait_mult, rx_frame_.INF[0]);
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// Ensure the next call will use the original TX frame.
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EXPECT_EQ(kRuleResultSingleShot, result)
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<< "Actual result name: " << teq1_rule_result_to_name(result);
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};
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class Teq1ErrorFreeChainingTest : public Teq1ErrorFreeTest {
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public:
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virtual void RunRules() {
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tx_data_.resize(oversized_data_len_, 'C');
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const_cast<struct EseSgBuffer *>(state_.app_data.tx)->base = tx_data_.data();
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const_cast<struct EseSgBuffer *>(state_.app_data.tx)->len = oversized_data_len_;
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state_.app_data.tx_total = oversized_data_len_;
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teq1_fill_info_block(&state_, &tx_frame_);
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// Ensure More bit was set.
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EXPECT_EQ(1, bs_get(PCB.I.more_data, tx_frame_.header.PCB));
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// Check that the tx_data was fully consumed.
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EXPECT_EQ(static_cast<uint32_t>(oversized_data_len_ - INF_LEN),
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state_.app_data.tx_total);
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// No one is checking the TX LRC since there is no card present.
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rx_frame_.header.LEN = 0;
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rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
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teq1_trace_header();
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teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
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teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
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enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
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teq1_trace_transmit(tx_next_.header.PCB, tx_next_.header.LEN);
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EXPECT_EQ(0, state_.errors);
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EXPECT_EQ(NULL, state_.last_error_message)
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<< "Last error: " << state_.last_error_message;
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EXPECT_EQ(kRuleResultContinue, result)
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<< "Actual result name: " << teq1_rule_result_to_name(result);
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// Check that the tx_buf was drained already for the next frame.
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// ...
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EXPECT_EQ(static_cast<uint32_t>(oversized_data_len_ - (2 * INF_LEN)),
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state_.app_data.tx_total);
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// Belt and suspenders: make sure no RX buf was used.
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EXPECT_EQ(rx_data_.size(), state_.app_data.rx_total);
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}
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int oversized_data_len_;
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};
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TEST_F(Teq1ErrorFreeChainingTest, I01_R1_I11_chaining) {
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oversized_data_len_ = INF_LEN * 3;
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tx_frame_.header.PCB = TEQ1_I(0, 0);
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rx_frame_.header.PCB = TEQ1_R(1, 0, 0);
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RunRules();
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EXPECT_EQ(TEQ1_I(1, 1), tx_next_.header.PCB)
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<< "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
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};
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TEST_F(Teq1ErrorFreeChainingTest, I11_R0_I01_chaining) {
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oversized_data_len_ = INF_LEN * 3;
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tx_frame_.header.PCB = TEQ1_I(1, 0);
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rx_frame_.header.PCB = TEQ1_R(0, 0, 0);
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RunRules();
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EXPECT_EQ(TEQ1_I(0, 1), tx_next_.header.PCB)
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<< "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
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};
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TEST_F(Teq1ErrorFreeChainingTest, I11_R0_I00_chaining) {
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oversized_data_len_ = INF_LEN * 2; // Exactly 2 frames worth.
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tx_frame_.header.PCB = TEQ1_I(1, 0);
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rx_frame_.header.PCB = TEQ1_R(0, 0, 0);
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RunRules();
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EXPECT_EQ(TEQ1_I(0, 0), tx_next_.header.PCB)
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<< "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
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};
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//
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// Error handling tests
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//
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//
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class Teq1Retransmit : public Teq1ErrorHandlingTest {
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public:
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virtual void SetUp() {
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// No data.
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state_.app_data.rx_total = 0;
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state_.app_data.tx_total = 0;
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tx_frame_.header.PCB = TEQ1_I(0, 0);
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teq1_fill_info_block(&state_, &tx_frame_);
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// No one is checking the TX LRC since there is no card present.
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// Assume the card may not even set the error bit.
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rx_frame_.header.LEN = 0;
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rx_frame_.header.PCB = TEQ1_R(0, 0, 0);
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rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
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}
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virtual void TearDown() {
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teq1_trace_header();
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teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
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teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
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enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
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// Not counted as an error as it was on the card-side.
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EXPECT_EQ(0, state_.errors);
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const char *kNull = NULL;
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EXPECT_EQ(kNull, state_.last_error_message) << state_.last_error_message;
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EXPECT_EQ(kRuleResultRetransmit, result)
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<< "Actual result name: " << teq1_rule_result_to_name(result);
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}
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};
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TEST_F(Teq1Retransmit, I00_R000_I00) {
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rx_frame_.header.PCB = TEQ1_R(0, 0, 0);
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rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
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};
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TEST_F(Teq1Retransmit, I00_R001_I00) {
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rx_frame_.header.PCB = TEQ1_R(0, 0, 1);
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rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
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};
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TEST_F(Teq1Retransmit, I00_R010_I00) {
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rx_frame_.header.PCB = TEQ1_R(0, 1, 0);
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rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
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};
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TEST_F(Teq1Retransmit, I00_R011_I00) {
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rx_frame_.header.PCB = TEQ1_R(0, 1, 1);
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rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_);
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}
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TEST_F(Teq1ErrorHandlingTest, I00_I00_bad_lrc) {
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// No data.
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state_.app_data.rx_total = 0;
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state_.app_data.tx_total = 0;
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tx_frame_.header.PCB = TEQ1_I(0, 0);
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teq1_fill_info_block(&state_, &tx_frame_);
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// No one is checking the TX LRC since there is no card present.
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rx_frame_.header.PCB = TEQ1_I(0, 0);
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rx_frame_.header.LEN = 0;
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rx_frame_.INF[0] = teq1_compute_LRC(&rx_frame_) - 1;
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teq1_trace_header();
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teq1_trace_transmit(tx_frame_.header.PCB, tx_frame_.header.LEN);
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teq1_trace_receive(rx_frame_.header.PCB, rx_frame_.header.LEN);
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enum RuleResult result = teq1_rules(&state_, &tx_frame_, &rx_frame_, &tx_next_);
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EXPECT_EQ(1, state_.errors);
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const char *kNull = NULL;
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EXPECT_NE(kNull, state_.last_error_message);
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EXPECT_STREQ("Invalid frame received", state_.last_error_message);
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EXPECT_EQ(TEQ1_R(0, 0, 1), tx_next_.header.PCB)
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<< "Actual next TX: " << teq1_pcb_to_name(tx_next_.header.PCB);
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EXPECT_EQ(kRuleResultSingleShot, result)
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<< "Actual result name: " << teq1_rule_result_to_name(result);
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};
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static const struct Teq1ProtocolOptions kTeq1Options = {
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.host_address = 0xA5,
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.node_address = 0x5A,
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.bwt = 1.624f,
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.etu = 0.00015f, /* elementary time unit, in seconds */
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.preprocess = NULL,
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};
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std::string to_hex(const std::vector<uint8_t>& data) {
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static constexpr char hex[] = "0123456789ABCDEF";
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std::string out;
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out.reserve(data.size() * 2);
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for (uint8_t c : data) {
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out.push_back(hex[c / 16]);
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out.push_back(hex[c % 16]);
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}
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return out;
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}
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class EseWireFake : public EseOperationsInterface {
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public:
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EseWireFake() : tx_cursor_(0), rx_cursor_(0) { }
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virtual ~EseWireFake() = default;
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virtual int EseOpen(struct EseInterface *UNUSED(ese), void *UNUSED(data)) {
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return 0;
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}
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virtual int EseReset(struct EseInterface *UNUSED(ese)) {
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ALOGI("EseReset called!"); // Add to invocations
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// Using the RX cursor, check for a reset expected.
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// This is on RX because the s(resync) global counter is on session resets.
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EXPECT_EQ(1, invocations.at(tx_cursor_).expect_reset);
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return 0;
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}
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virtual int EsePoll(struct EseInterface *UNUSED(ese), uint8_t UNUSED(poll_for),
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float UNUSED(timeout), int UNUSED(complete)) {
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return 0;
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}
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virtual void EseClose(struct EseInterface *UNUSED(ese)) { };
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virtual uint32_t EseTransceive(struct EseInterface *ese, const struct EseSgBuffer *tx_sg, uint32_t tx_nsg,
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struct EseSgBuffer *rx_sg, uint32_t rx_nsg) {
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rx_cursor_ = 0;
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return teq1_transceive(ese, &kTeq1Options, tx_sg, tx_nsg, rx_sg, rx_nsg);
|
|
}
|
|
|
|
virtual uint32_t EseHwTransmit(struct EseInterface *UNUSED(ese), const uint8_t *data,
|
|
uint32_t len, int UNUSED(complete)) {
|
|
EXPECT_GT(invocations.size(), tx_cursor_);
|
|
if (invocations.size() <= tx_cursor_) {
|
|
return 0;
|
|
}
|
|
if (!len) {
|
|
return 0;
|
|
}
|
|
if (!invocations.size()) {
|
|
return 0;
|
|
}
|
|
// Just called once per teq1_transmit -- no partials.
|
|
const struct Invocation &invocation = invocations.at(tx_cursor_++);
|
|
|
|
EXPECT_EQ(invocation.expected_tx.size(), len);
|
|
int eq = memcmp(data, invocation.expected_tx.data(), len);
|
|
const std::vector<uint8_t> vec_data(data, data + len);
|
|
EXPECT_EQ(0, eq)
|
|
<< "Got: '" << to_hex(vec_data) << "' "
|
|
<< "Expected: '" << to_hex(invocation.expected_tx) << "'";
|
|
|
|
return len;
|
|
}
|
|
|
|
virtual uint32_t EseHwReceive(struct EseInterface *UNUSED(ese), uint8_t *data,
|
|
uint32_t len, int UNUSED(complete)) {
|
|
if (!len) {
|
|
return 0;
|
|
}
|
|
// Get this calls expected data.
|
|
EXPECT_GT(invocations.size(), rx_cursor_);
|
|
if (!invocations.size())
|
|
return 0;
|
|
struct Invocation &invocation = invocations.at(rx_cursor_);
|
|
|
|
// Supply the golden return data and pop off the invocation.
|
|
// Allows partial reads from the invocation stack.
|
|
uint32_t rx_total = 0;
|
|
if (len <= invocation.rx.size()) {
|
|
rx_total = len;
|
|
memcpy(data, invocation.rx.data(), invocation.rx.size());
|
|
}
|
|
uint32_t remaining = invocation.rx.size() - rx_total;
|
|
if (remaining && rx_total) {
|
|
invocation.rx.erase(invocation.rx.begin(),
|
|
invocation.rx.begin() + rx_total);
|
|
} else {
|
|
rx_cursor_++;
|
|
// RX shouldn't get ahead of TX.
|
|
EXPECT_GE(tx_cursor_, rx_cursor_);
|
|
// We could delete, but this make test bugs a little easier to see.
|
|
}
|
|
return rx_total;
|
|
}
|
|
|
|
struct Invocation {
|
|
std::vector<uint8_t> rx;
|
|
std::vector<uint8_t> expected_tx;
|
|
int expect_reset;
|
|
};
|
|
|
|
std::vector<Invocation> invocations;
|
|
private:
|
|
uint32_t tx_cursor_;
|
|
uint32_t rx_cursor_;
|
|
};
|
|
|
|
class Teq1TransceiveTest : public virtual Test {
|
|
public:
|
|
Teq1TransceiveTest() { }
|
|
virtual ~Teq1TransceiveTest() { }
|
|
|
|
void SetUp() {
|
|
// Configure ese with our internal ops.
|
|
EseOperationsWrapper::InitializeEse(&ese_, &wire_);
|
|
// Start with normal seq's.
|
|
TEQ1_INIT_CARD_STATE((struct Teq1CardState *)(&(ese_.pad[0])));
|
|
}
|
|
|
|
void TearDown() {
|
|
wire_.invocations.resize(0);
|
|
}
|
|
|
|
protected:
|
|
EseWireFake wire_;
|
|
EseInterface ese_;
|
|
};
|
|
|
|
|
|
TEST_F(Teq1TransceiveTest, NormalTransceiveUnchained) {
|
|
EXPECT_EQ(0, ese_open(&ese_, NULL));
|
|
|
|
// I(0,0) ->
|
|
// <- I(0, 0)
|
|
wire_.invocations.resize(1);
|
|
struct Teq1Frame frame;
|
|
size_t frame_size = 0;
|
|
frame.header.NAD = kTeq1Options.node_address;
|
|
frame.header.PCB = TEQ1_I(0, 0);
|
|
frame.header.LEN = 4;
|
|
frame.INF[0] = 'A';
|
|
frame.INF[1] = 'B';
|
|
frame.INF[2] = 'C';
|
|
frame.INF[3] = 'D';
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[0].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[0].expected_tx.data(), &frame.val[0], frame_size);
|
|
ALOGI("Planning to send:");
|
|
teq1_trace_transmit(frame.header.PCB, frame.header.LEN);
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.host_address;
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[0].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[0].rx.data(), &frame, frame_size);
|
|
ALOGI("Expecting to receive:");
|
|
teq1_trace_receive(frame.header.PCB, frame.header.LEN);
|
|
|
|
const uint8_t payload[] = { 'A', 'B', 'C', 'D' };
|
|
uint8_t reply[5]; // Should stay empty.
|
|
EXPECT_EQ(0, ese_transceive(&ese_, payload, sizeof(payload), reply, sizeof(reply)));
|
|
};
|
|
|
|
|
|
TEST_F(Teq1TransceiveTest, NormalUnchainedRetransmitRecovery) {
|
|
EXPECT_EQ(0, ese_open(&ese_, NULL));
|
|
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- I(0, 0)
|
|
wire_.invocations.resize(2);
|
|
struct Teq1Frame frame;
|
|
size_t frame_size = 0;
|
|
frame.header.NAD = kTeq1Options.node_address;
|
|
frame.header.PCB = TEQ1_I(0, 0);
|
|
frame.header.LEN = 4;
|
|
frame.INF[0] = 'A';
|
|
frame.INF[1] = 'B';
|
|
frame.INF[2] = 'C';
|
|
frame.INF[3] = 'D';
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[0].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[0].expected_tx.data(), &frame.val[0], frame_size);
|
|
wire_.invocations[1].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[1].expected_tx.data(), &frame.val[0], frame_size);
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.host_address;
|
|
frame.header.PCB = TEQ1_R(0, 1, 0);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[0].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[0].rx.data(), &frame, frame_size);
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.host_address;
|
|
frame.header.PCB = TEQ1_I(0, 0);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[1].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[1].rx.data(), &frame, frame_size);
|
|
|
|
const uint8_t payload[] = { 'A', 'B', 'C', 'D' };
|
|
uint8_t reply[5]; // Should stay empty.
|
|
EXPECT_EQ(0, ese_transceive(&ese_, payload, sizeof(payload), reply, sizeof(reply)));
|
|
};
|
|
|
|
TEST_F(Teq1TransceiveTest, RetransmitResyncRecovery) {
|
|
EXPECT_EQ(0, ese_open(&ese_, NULL));
|
|
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// S(RESYNC, REQUEST) -> (retran this is another case)
|
|
// <- S(RESYNC, RESPONSE)
|
|
// I(0, 0) [4] ->
|
|
// <- I(0, 0) [0]
|
|
wire_.invocations.resize(6);
|
|
struct Teq1Frame frame;
|
|
size_t frame_size = 0;
|
|
frame.header.NAD = kTeq1Options.node_address;
|
|
frame.header.PCB = TEQ1_I(0, 0);
|
|
frame.header.LEN = 4;
|
|
frame.INF[0] = 'A';
|
|
frame.INF[1] = 'B';
|
|
frame.INF[2] = 'C';
|
|
frame.INF[3] = 'D';
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[0].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[0].expected_tx.data(), &frame.val[0], frame_size);
|
|
wire_.invocations[1].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[1].expected_tx.data(), &frame.val[0], frame_size);
|
|
wire_.invocations[2].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[2].expected_tx.data(), &frame.val[0], frame_size);
|
|
wire_.invocations[3].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[3].expected_tx.data(), &frame.val[0], frame_size);
|
|
wire_.invocations[5].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[5].expected_tx.data(), &frame.val[0], frame_size);
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.node_address;
|
|
frame.header.PCB = TEQ1_S_RESYNC(0);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[4].expected_tx.resize(frame_size);
|
|
memcpy(wire_.invocations[4].expected_tx.data(), &frame, frame_size);
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.host_address;
|
|
frame.header.PCB = TEQ1_R(0, 1, 0);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[0].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[0].rx.data(), &frame, frame_size);
|
|
wire_.invocations[1].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[1].rx.data(), &frame, frame_size);
|
|
wire_.invocations[2].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[2].rx.data(), &frame, frame_size);
|
|
wire_.invocations[3].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[3].rx.data(), &frame, frame_size);
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.host_address;
|
|
frame.header.PCB = TEQ1_S_RESYNC(1);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[4].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[4].rx.data(), &frame, frame_size);
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.host_address;
|
|
frame.header.PCB = TEQ1_I(0, 0);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
wire_.invocations[5].rx.resize(frame_size);
|
|
memcpy(wire_.invocations[5].rx.data(), &frame, frame_size);
|
|
|
|
const uint8_t payload[] = { 'A', 'B', 'C', 'D' };
|
|
uint8_t reply[5]; // Should stay empty.
|
|
EXPECT_EQ(0, ese_transceive(&ese_, payload, sizeof(payload), reply, sizeof(reply)));
|
|
};
|
|
|
|
// Error case described in b/63546784
|
|
TEST_F(Teq1TransceiveTest, RetransmitResyncLoop) {
|
|
EXPECT_EQ(0, ese_open(&ese_, NULL));
|
|
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// S(RESYNC, REQUEST) ->
|
|
// <- S(RESYNC, RESPONSE)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// I(0,0) [4] ->
|
|
// <- R(0, 1, 0)
|
|
// S(RESYNC, REQUEST) ->
|
|
// <- S(RESYNC, RESPONSE)
|
|
// ...
|
|
// 6 failure loops before a reset then 6 more before a hard failure.
|
|
wire_.invocations.resize(5 * 12);
|
|
struct Teq1Frame frame;
|
|
size_t frame_size = 0;
|
|
|
|
frame.header.NAD = kTeq1Options.node_address;
|
|
frame.header.PCB = TEQ1_I(0, 0);
|
|
frame.header.LEN = 4;
|
|
frame.INF[0] = 'A';
|
|
frame.INF[1] = 'B';
|
|
frame.INF[2] = 'C';
|
|
frame.INF[3] = 'D';
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
// Initialize all invocations to I/R then overwrite with resyncs.
|
|
for (auto &invocation : wire_.invocations) {
|
|
invocation.expected_tx.resize(frame_size);
|
|
memcpy(invocation.expected_tx.data(), &frame.val[0], frame_size);
|
|
}
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.host_address;
|
|
frame.header.PCB = TEQ1_R(0, 1, 0);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
for (auto &invocation : wire_.invocations) {
|
|
invocation.rx.resize(frame_size);
|
|
memcpy(invocation.rx.data(), &frame.val[0], frame_size);
|
|
}
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.node_address;
|
|
frame.header.PCB = TEQ1_S_RESYNC(0);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
int count = 0;
|
|
for (auto &invocation : wire_.invocations) {
|
|
if (++count % 5 == 0) {
|
|
invocation.expected_tx.resize(frame_size);
|
|
memcpy(invocation.expected_tx.data(), &frame, frame_size);
|
|
}
|
|
}
|
|
|
|
frame.header.LEN = 0;
|
|
frame.header.NAD = kTeq1Options.host_address;
|
|
frame.header.PCB = TEQ1_S_RESYNC(1);
|
|
frame.INF[frame.header.LEN] = teq1_compute_LRC(&frame);
|
|
frame_size = sizeof(frame.header) + frame.header.LEN + 1;
|
|
count = 0;
|
|
for (auto &invocation : wire_.invocations) {
|
|
if (++count % 5 == 0) {
|
|
invocation.rx.resize(frame_size);
|
|
memcpy(invocation.rx.data(), &frame, frame_size);
|
|
}
|
|
}
|
|
|
|
wire_.invocations[30].expect_reset = 1;
|
|
|
|
const uint8_t payload[] = { 'A', 'B', 'C', 'D' };
|
|
uint8_t reply[5]; // Should stay empty.
|
|
EXPECT_EQ(-1, ese_transceive(&ese_, payload, sizeof(payload), reply, sizeof(reply)));
|
|
EXPECT_NE(0, ese_error(&ese_));
|
|
};
|
|
|
|
|