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151 lines
3.7 KiB
151 lines
3.7 KiB
@/******************************************************************************
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@ *
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@ * Copyright (C) 2018 The Android Open Source Project
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@ *
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@ * Licensed under the Apache License, Version 2.0 (the "License");
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@ * you may not use this file except in compliance with the License.
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@ * You may obtain a copy of the License at:
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@ *
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@ * http://www.apache.org/licenses/LICENSE-2.0
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@ *
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@ * Unless required by applicable law or agreed to in writing, software
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@ * distributed under the License is distributed on an "AS IS" BASIS,
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@ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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@ * See the License for the specific language governing permissions and
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@ * limitations under the License.
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@ *
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@ *****************************************************************************
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@ * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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@*/
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.text
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.p2align 2
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.global ixheaacd_radix4bfly
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.type ixheaacd_radix4bfly, %function
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ixheaacd_radix4bfly:
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STMFD sp!, {r4-r12, r14}
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SUB sp, sp, #16
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MOV r6, #6
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MUL r7, r6, r3
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MOV r4, r3
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STR r7, [sp]
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MOV r3, r3, lsl #1
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STR r2, [sp, #8]
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STR r4, [sp, #12]
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ADD r2, r1, r3, lsl #2
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ADD r0, r0, #8
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RADIX4_OUTLOOP:
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RADIX4_INLOOP:
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LDR r6, [r1]
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LDR r7, [r2]
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LDR r8, [r2, r3, lsl #2]
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LDR r9, [r2, r3, lsl #3]
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ADD r10, r6, r8
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SUB r11, r6, r8
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ADD r12, r7, r9
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SUB r14, r7, r9
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ADD r6, r10, r12
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SUB r7, r10, r12
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STR r6, [r1], #4
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LDR r8, [r1]
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LDR r6, [r2, #4]!
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LDR r9, [r2, r3, lsl #2]!
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LDR r10, [r2, r3, lsl #2]!
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ADD r12, r8, r9
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SUB r8, r8, r9
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ADD r9, r6, r10
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SUB r6, r6, r10
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ADD r10, r12, r9
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STR r10, [r1], #4
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SUB r12, r12, r9
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ADD r9, r11, r6
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SUB r10, r11, r6
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ADD r11, r8, r14
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LDR r5, [r0], #-4
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SUB r6, r8, r14
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SMULWB r14, r10, r5
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SMULWT r8, r11, r5
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SUBS r4, r4, #1
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SUB r8, r8, r14
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MOV r8, r8, lsl #1
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STR r8, [r2], #-4
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SMULWT r14, r10, r5
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SMLAWB r8, r11, r5, r14
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LDR r11, [r0], #-4
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MOV r8, r8, lsl #1
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STR r8, [r2], -r3, lsl #2
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SMULWT r10, r7, r11
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SMLAWB r8, r12, r11, r10
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LDR r14, [r0], #20
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MOV r5, r8, lsl #1
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SMULWB r10, r7, r11
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SMULWT r8, r12, r11
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STR r5, [r2], #4
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SUB r7, r8, r10
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MOV r7, r7, lsl #1
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SMULWB r11, r9, r14
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SMULWT r12, r6, r14
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STR r7, [r2], -r3, lsl #2
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SUB r12, r12, r11
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MOV r12, r12, lsl #1
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SMULWT r10, r9, r14
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SMLAWB r7, r6, r14, r10
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STR r12, [r2], #-4
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MOV r7, r7, lsl #1
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STR r7, [r2], #8
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BNE RADIX4_INLOOP
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LDR r8, [sp]
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LDR r4, [sp, #12]
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LDR r6, [sp, #8]
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SUB r0, r0, r8, lsl #1
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ADD r1, r1, r8, lsl #2
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ADD r2, r2, r8, lsl #2
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SUBS r6, r6, #1
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STR r6, [sp, #8]
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BNE RADIX4_OUTLOOP
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ADD sp, sp, #16
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LDMFD sp!, {r4-r12, r15}
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