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381 lines
8.3 KiB
381 lines
8.3 KiB
@/******************************************************************************
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@ *
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@ * Copyright (C) 2018 The Android Open Source Project
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@ *
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@ * Licensed under the Apache License, Version 2.0 (the "License");
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@ * you may not use this file except in compliance with the License.
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@ * You may obtain a copy of the License at:
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@ *
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@ * http://www.apache.org/licenses/LICENSE-2.0
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@ *
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@ * Unless required by applicable law or agreed to in writing, software
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@ * distributed under the License is distributed on an "AS IS" BASIS,
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@ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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@ * See the License for the specific language governing permissions and
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@ * limitations under the License.
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@ *
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@ *****************************************************************************
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@ * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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@*/
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.text
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.p2align 2
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.global ixheaacd_sbr_qmfsyn64_winadd
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.type ixheaacd_sbr_qmfsyn64_winadd, %function
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ixheaacd_sbr_qmfsyn64_winadd:
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STMFD sp!, {R4-R12, R14}
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VPUSH {D8- D15}
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LDR R4, [SP, #104]
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LDR R5, [SP, #108]
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MOV R7, #0x8000
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VLD1.16 D0, [R0]!
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MOV R12, R2
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VDUP.32 Q15, R7
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VLD1.16 D1, [R2]!
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VDUP.32 Q11, R4
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MOV R10, R0
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MOV R11, R2
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ADD R0, R0, #504
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ADD R2, R2, #248
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VNEG.S32 Q14, Q11
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VSHL.S32 Q10, Q15, Q14
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MOV R6, #64
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MOV R6, R6, LSL #1
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ADD R12, R12, R6
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MOV R7, #128
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MOV R9, R7, LSL #1
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ADD R1, R1, R9
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MOV R6, #16
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MOV R7, #128
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MOV R9, R7, LSL #1
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MOV R7, #256
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MOV R8, R7, LSL #1
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MOV R5, R5, LSL #1
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VLD1.16 D2, [R0], R8
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VMOV Q13, Q10
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VMLAL.S16 Q13, D0, D1
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VLD1.16 D3, [R2], R9
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VLD1.16 D4, [R0], R8
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VMLAL.S16 Q13, D2, D3
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VLD1.16 D5, [R2], R9
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VLD1.16 D6, [R0], R8
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VMLAL.S16 Q13, D5, D4
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VLD1.16 D7, [R2], R9
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VLD1.16 D8, [R0], R8
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VMLAL.S16 Q13, D7, D6
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VLD1.16 D9, [R2], R9
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MOV R0, R10
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MOV R2, R11
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VLD1.16 D10, [R1]!
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VMLAL.S16 Q13, D9, D8
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MOV R10, R1
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VLD1.16 D11, [R12]!
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ADD R1, R1, #504
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MOV R11, R12
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VLD1.16 D12, [R1], R8
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ADD R12, R12, #248
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VMLAL.S16 Q13, D10, D11
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VLD1.16 D13, [R12], R9
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VLD1.16 D14, [R1], R8
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VMLAL.S16 Q13, D12, D13
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VLD1.16 D15, [R12], R9
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VLD1.16 D16, [R1], R8
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VMLAL.S16 Q13, D15, D14
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VLD1.16 D17, [R12], R9
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VLD1.16 D18, [R1], R8
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VMLAL.S16 Q13, D17, D16
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VLD1.16 D19, [R12], R9
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VMLAL.S16 Q13, D19, D18
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VLD1.16 D0, [R0]!
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MOV R12, R11
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MOV R1, R10
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VLD1.16 D1, [R2]!
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MOV R10, R0
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VQSHL.S32 Q13, Q13, Q11
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ADD R0, R0, #504
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MOV R11, R2
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VLD1.16 D2, [R0], R8
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ADD R2, R2, #248
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VSHR.S32 Q14, Q13, #16
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VLD1.16 D3, [R2], R9
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VUZP.16 D28, D29
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VMOV Q13, Q10
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VLD1.16 D4, [R0], R8
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VLD1.16 D5, [R2], R9
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VLD1.16 D6, [R0], R8
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VLD1.16 D7, [R2], R9
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VLD1.16 D8, [R0], R8
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VLD1.16 D9, [R2], R9
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MOV R0, R10
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MOV R2, R11
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VLD1.16 D10, [R1]!
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MOV R10, R1
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VLD1.16 D11, [R12]!
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ADD R1, R1, #504
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MOV R11, R12
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VLD1.16 D12, [R1], R8
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ADD R12, R12, #248
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VLD1.16 D13, [R12], R9
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VLD1.16 D14, [R1], R8
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VLD1.16 D15, [R12], R9
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VLD1.16 D16, [R1], R8
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VLD1.16 D17, [R12], R9
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VLD1.16 D18, [R1], R8
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SUB R6, R6, #2
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VLD1.16 D19, [R12], R9
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MOV R1, R10
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MOV R12, R11
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LOOP_1:
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VMLAL.S16 Q13, D0, D1
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VST1.16 D28[0], [R3], R5
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VMLAL.S16 Q13, D2, D3
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VLD1.16 D0, [R0]!
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VMLAL.S16 Q13, D5, D4
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VMLAL.S16 Q13, D7, D6
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VST1.16 D28[1], [R3], R5
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MOV R10, R0
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VLD1.16 D1, [R2]!
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ADD R0, R0, #504
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VMLAL.S16 Q13, D9, D8
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VST1.16 D28[2], [R3], R5
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VMLAL.S16 Q13, D10, D11
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VST1.16 D28[3], [R3], R5
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MOV R11, R2
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VLD1.16 D2, [R0], R8
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ADD R2, R2, #248
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VMLAL.S16 Q13, D12, D13
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VLD1.16 D3, [R2], R9
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VMLAL.S16 Q13, D15, D14
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VMLAL.S16 Q13, D17, D16
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VLD1.16 D4, [R0], R8
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VMLAL.S16 Q13, D19, D18
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VLD1.16 D5, [R2], R9
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VLD1.16 D6, [R0], R8
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VQSHL.S32 Q13, Q13, Q11
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VSHR.S32 Q14, Q13, #16
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VLD1.16 D7, [R2], R9
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VMOV Q13, Q10
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VUZP.16 D28, D29
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VMLAL.S16 Q13, D0, D1
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VMLAL.S16 Q13, D2, D3
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VLD1.16 D8, [R0], R8
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VMLAL.S16 Q13, D5, D4
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VMLAL.S16 Q13, D7, D6
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VLD1.16 D9, [R2], R9
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VLD1.16 D10, [R1]!
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VMLAL.S16 Q13, D9, D8
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MOV R2, R11
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VLD1.16 D11, [R12]!
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MOV R0, R10
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MOV R10, R1
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ADD R1, R1, #504
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MOV R11, R12
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VLD1.16 D12, [R1], R8
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ADD R12, R12, #248
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VLD1.16 D13, [R12], R9
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VMLAL.S16 Q13, D10, D11
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VLD1.16 D14, [R1], R8
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VMLAL.S16 Q13, D12, D13
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VLD1.16 D15, [R12], R9
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VLD1.16 D16, [R1], R8
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VMLAL.S16 Q13, D15, D14
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VLD1.16 D17, [R12], R9
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VLD1.16 D18, [R1], R8
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VMLAL.S16 Q13, D17, D16
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VLD1.16 D19, [R12], R9
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MOV R1, R10
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VMLAL.S16 Q13, D19, D18
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VST1.16 D28[0], [R3], R5
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MOV R12, R11
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VLD1.16 D0, [R0]!
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VLD1.16 D1, [R2]!
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VQSHL.S32 Q13, Q13, Q11
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VST1.16 D28[1], [R3], R5
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MOV R10, R0
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VST1.16 D28[2], [R3], R5
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ADD R0, R0, #504
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VST1.16 D28[3], [R3], R5
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MOV R11, R2
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VSHR.S32 Q14, Q13, #16
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VLD1.16 D2, [R0], R8
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ADD R2, R2, #248
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VLD1.16 D3, [R2], R9
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VLD1.16 D4, [R0], R8
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VLD1.16 D5, [R2], R9
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VLD1.16 D6, [R0], R8
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VLD1.16 D7, [R2], R9
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VLD1.16 D8, [R0], R8
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VLD1.16 D9, [R2], R9
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VUZP.16 D28, D29
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VMOV Q13, Q10
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MOV R0, R10
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VLD1.16 D10, [R1]!
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MOV R2, R11
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MOV R10, R1
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VLD1.16 D11, [R12]!
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ADD R1, R1, #504
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MOV R11, R12
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VLD1.16 D12, [R1], R8
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ADD R12, R12, #248
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VLD1.16 D13, [R12], R9
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VLD1.16 D14, [R1], R8
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VLD1.16 D15, [R12], R9
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VLD1.16 D16, [R1], R8
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VLD1.16 D17, [R12], R9
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SUBS R6, R6, #2
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VLD1.16 D18, [R1], R8
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MOV R1, R10
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VLD1.16 D19, [R12], R9
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MOV R12, R11
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BGT LOOP_1
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VMLAL.S16 Q13, D0, D1
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VST1.16 D28[0], [R3], R5
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VMLAL.S16 Q13, D2, D3
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VMLAL.S16 Q13, D5, D4
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VST1.16 D28[1], [R3], R5
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VMLAL.S16 Q13, D7, D6
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VMLAL.S16 Q13, D9, D8
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VST1.16 D28[2], [R3], R5
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VMLAL.S16 Q13, D10, D11
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VMLAL.S16 Q13, D12, D13
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VST1.16 D28[3], [R3], R5
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VMLAL.S16 Q13, D15, D14
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VMLAL.S16 Q13, D17, D16
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VMLAL.S16 Q13, D19, D18
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VQSHL.S32 Q13, Q13, Q11
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VSHR.S32 Q14, Q13, #16
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VUZP.16 D28, D29
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VST1.16 D28[0], [R3], R5
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VST1.16 D28[1], [R3], R5
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VST1.16 D28[2], [R3], R5
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VST1.16 D28[3], [R3], R5
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VPOP {D8 - D15}
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LDMFD sp!, {R4-R12, R15}
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