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481 lines
23 KiB
481 lines
23 KiB
// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s \
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// RUN: | FileCheck -check-prefix=CHECK-X86-64 %s
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// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm -o - %s \
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// RUN: | FileCheck -check-prefix=CHECK-PPC64 %s
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//
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// Tests for bitfield access patterns in C++ with special attention to
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// conformance to C++11 memory model requirements.
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namespace N0 {
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// Test basic bitfield layout access across interesting byte and word
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// boundaries on both little endian and big endian platforms.
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struct __attribute__((packed)) S {
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unsigned b00 : 14;
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unsigned b01 : 2;
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unsigned b20 : 6;
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unsigned b21 : 2;
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unsigned b30 : 30;
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unsigned b31 : 2;
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unsigned b70 : 6;
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unsigned b71 : 2;
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};
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unsigned read00(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N06read00
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-X86-64: %[[and:.*]] = and i64 %[[val]], 16383
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// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-X86-64: ret i32 %[[trunc]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read00
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 50
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// CHECK-PPC64: %[[trunc:.*]] = trunc i64 %[[shr]] to i32
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// CHECK-PPC64: ret i32 %[[trunc]]
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return s->b00;
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}
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unsigned read01(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N06read01
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 14
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// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3
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// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-X86-64: ret i32 %[[trunc]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read01
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 48
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// CHECK-PPC64: %[[and:.*]] = and i64 %[[shr]], 3
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// CHECK-PPC64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-PPC64: ret i32 %[[trunc]]
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return s->b01;
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}
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unsigned read20(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N06read20
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 16
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// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 63
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// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-X86-64: ret i32 %[[trunc]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read20
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 42
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// CHECK-PPC64: %[[and:.*]] = and i64 %[[shr]], 63
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// CHECK-PPC64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-PPC64: ret i32 %[[trunc]]
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return s->b20;
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}
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unsigned read21(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N06read21
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 22
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// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3
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// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-X86-64: ret i32 %[[trunc]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read21
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 40
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// CHECK-PPC64: %[[and:.*]] = and i64 %[[shr]], 3
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// CHECK-PPC64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-PPC64: ret i32 %[[trunc]]
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return s->b21;
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}
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unsigned read30(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N06read30
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 24
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// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 1073741823
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// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-X86-64: ret i32 %[[trunc]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read30
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 10
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// CHECK-PPC64: %[[and:.*]] = and i64 %[[shr]], 1073741823
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// CHECK-PPC64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-PPC64: ret i32 %[[trunc]]
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return s->b30;
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}
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unsigned read31(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N06read31
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 54
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// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 3
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// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-X86-64: ret i32 %[[trunc]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read31
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 8
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// CHECK-PPC64: %[[and:.*]] = and i64 %[[shr]], 3
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// CHECK-PPC64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-PPC64: ret i32 %[[trunc]]
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return s->b31;
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}
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unsigned read70(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N06read70
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 56
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// CHECK-X86-64: %[[and:.*]] = and i64 %[[shr]], 63
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// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-X86-64: ret i32 %[[trunc]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read70
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i64 %[[val]], 2
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// CHECK-PPC64: %[[and:.*]] = and i64 %[[shr]], 63
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// CHECK-PPC64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-PPC64: ret i32 %[[trunc]]
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return s->b70;
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}
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unsigned read71(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N06read71
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-X86-64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-X86-64: %[[shr:.*]] = lshr i64 %[[val]], 62
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// CHECK-X86-64: %[[trunc:.*]] = trunc i64 %[[shr]] to i32
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// CHECK-X86-64: ret i32 %[[trunc]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N06read71
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i64*
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// CHECK-PPC64: %[[val:.*]] = load i64, i64* %[[ptr]]
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// CHECK-PPC64: %[[and:.*]] = and i64 %[[val]], 3
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// CHECK-PPC64: %[[trunc:.*]] = trunc i64 %[[and]] to i32
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// CHECK-PPC64: ret i32 %[[trunc]]
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return s->b71;
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}
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}
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namespace N1 {
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// Ensure that neither loads nor stores to bitfields are not widened into
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// other memory locations. (PR13691)
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//
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// NOTE: We could potentially widen loads based on their alignment if we are
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// comfortable requiring that subsequent memory locations within the
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// alignment-widened load are not volatile.
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struct S {
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char a;
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unsigned b : 1;
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char c;
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};
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unsigned read(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N14read
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// CHECK-X86-64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
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// CHECK-X86-64: %[[val:.*]] = load i8, i8* %[[ptr]]
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// CHECK-X86-64: %[[and:.*]] = and i8 %[[val]], 1
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// CHECK-X86-64: %[[ext:.*]] = zext i8 %[[and]] to i32
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// CHECK-X86-64: ret i32 %[[ext]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N14read
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// CHECK-PPC64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
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// CHECK-PPC64: %[[val:.*]] = load i8, i8* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i8 %[[val]], 7
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// CHECK-PPC64: %[[ext:.*]] = zext i8 %[[shr]] to i32
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// CHECK-PPC64: ret i32 %[[ext]]
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return s->b;
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}
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void write(S* s, unsigned x) {
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// CHECK-X86-64-LABEL: define void @_ZN2N15write
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// CHECK-X86-64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
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// CHECK-X86-64: %[[x_trunc:.*]] = trunc i32 %{{.*}} to i8
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// CHECK-X86-64: %[[old:.*]] = load i8, i8* %[[ptr]]
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// CHECK-X86-64: %[[x_and:.*]] = and i8 %[[x_trunc]], 1
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// CHECK-X86-64: %[[old_and:.*]] = and i8 %[[old]], -2
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// CHECK-X86-64: %[[new:.*]] = or i8 %[[old_and]], %[[x_and]]
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// CHECK-X86-64: store i8 %[[new]], i8* %[[ptr]]
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// CHECK-PPC64-LABEL: define void @_ZN2N15write
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// CHECK-PPC64: %[[ptr:.*]] = getelementptr inbounds %{{.*}}, %{{.*}}* %{{.*}}, i32 0, i32 1
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// CHECK-PPC64: %[[x_trunc:.*]] = trunc i32 %{{.*}} to i8
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// CHECK-PPC64: %[[old:.*]] = load i8, i8* %[[ptr]]
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// CHECK-PPC64: %[[x_and:.*]] = and i8 %[[x_trunc]], 1
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// CHECK-PPC64: %[[x_shl:.*]] = shl i8 %[[x_and]], 7
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// CHECK-PPC64: %[[old_and:.*]] = and i8 %[[old]], 127
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// CHECK-PPC64: %[[new:.*]] = or i8 %[[old_and]], %[[x_shl]]
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// CHECK-PPC64: store i8 %[[new]], i8* %[[ptr]]
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s->b = x;
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}
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}
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namespace N2 {
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// Do widen loads and stores to bitfields when those bitfields have padding
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// within the struct following them.
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struct S {
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unsigned b : 24;
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void *p;
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};
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unsigned read(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N24read
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
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// CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]]
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// CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215
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// CHECK-X86-64: ret i32 %[[and]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N24read
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
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// CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8
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// CHECK-PPC64: ret i32 %[[shr]]
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return s->b;
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}
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void write(S* s, unsigned x) {
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// CHECK-X86-64-LABEL: define void @_ZN2N25write
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
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// CHECK-X86-64: %[[old:.*]] = load i32, i32* %[[ptr]]
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// CHECK-X86-64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
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// CHECK-X86-64: %[[old_and:.*]] = and i32 %[[old]], -16777216
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// CHECK-X86-64: %[[new:.*]] = or i32 %[[old_and]], %[[x_and]]
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// CHECK-X86-64: store i32 %[[new]], i32* %[[ptr]]
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// CHECK-PPC64-LABEL: define void @_ZN2N25write
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
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// CHECK-PPC64: %[[old:.*]] = load i32, i32* %[[ptr]]
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// CHECK-PPC64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
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// CHECK-PPC64: %[[x_shl:.*]] = shl i32 %[[x_and]], 8
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// CHECK-PPC64: %[[old_and:.*]] = and i32 %[[old]], 255
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// CHECK-PPC64: %[[new:.*]] = or i32 %[[old_and]], %[[x_shl]]
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// CHECK-PPC64: store i32 %[[new]], i32* %[[ptr]]
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s->b = x;
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}
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}
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namespace N3 {
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// Do widen loads and stores to bitfields through the trailing padding at the
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// end of a struct.
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struct S {
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unsigned b : 24;
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};
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unsigned read(S* s) {
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// CHECK-X86-64-LABEL: define i32 @_ZN2N34read
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
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// CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]]
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// CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215
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// CHECK-X86-64: ret i32 %[[and]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N34read
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
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// CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]]
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// CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8
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// CHECK-PPC64: ret i32 %[[shr]]
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return s->b;
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}
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void write(S* s, unsigned x) {
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// CHECK-X86-64-LABEL: define void @_ZN2N35write
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// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
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// CHECK-X86-64: %[[old:.*]] = load i32, i32* %[[ptr]]
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// CHECK-X86-64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
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// CHECK-X86-64: %[[old_and:.*]] = and i32 %[[old]], -16777216
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// CHECK-X86-64: %[[new:.*]] = or i32 %[[old_and]], %[[x_and]]
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// CHECK-X86-64: store i32 %[[new]], i32* %[[ptr]]
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// CHECK-PPC64-LABEL: define void @_ZN2N35write
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// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
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// CHECK-PPC64: %[[old:.*]] = load i32, i32* %[[ptr]]
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// CHECK-PPC64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
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// CHECK-PPC64: %[[x_shl:.*]] = shl i32 %[[x_and]], 8
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// CHECK-PPC64: %[[old_and:.*]] = and i32 %[[old]], 255
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// CHECK-PPC64: %[[new:.*]] = or i32 %[[old_and]], %[[x_shl]]
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// CHECK-PPC64: store i32 %[[new]], i32* %[[ptr]]
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s->b = x;
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}
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}
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namespace N4 {
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// Do NOT widen loads and stores to bitfields into padding at the end of
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// a class which might end up with members inside of it when inside a derived
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// class.
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struct Base {
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virtual ~Base() {}
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unsigned b : 24;
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};
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// Imagine some other translation unit introduces:
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#if 0
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struct Derived : public Base {
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char c;
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};
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#endif
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unsigned read(Base* s) {
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// FIXME: We should widen this load as long as the function isn't being
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// instrumented by ThreadSanitizer.
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//
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// CHECK-X86-64-LABEL: define i32 @_ZN2N44read
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// CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
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// CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
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// CHECK-X86-64: %[[val:.*]] = load i24, i24* %[[ptr]]
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// CHECK-X86-64: %[[ext:.*]] = zext i24 %[[val]] to i32
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// CHECK-X86-64: ret i32 %[[ext]]
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// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N44read
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// CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
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// CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
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// CHECK-PPC64: %[[val:.*]] = load i24, i24* %[[ptr]]
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// CHECK-PPC64: %[[ext:.*]] = zext i24 %[[val]] to i32
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// CHECK-PPC64: ret i32 %[[ext]]
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return s->b;
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}
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void write(Base* s, unsigned x) {
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// CHECK-X86-64-LABEL: define void @_ZN2N45write
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// CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
|
|
// CHECK-X86-64: %[[new:.*]] = trunc i32 %{{.*}} to i24
|
|
// CHECK-X86-64: store i24 %[[new]], i24* %[[ptr]]
|
|
// CHECK-PPC64-LABEL: define void @_ZN2N45write
|
|
// CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
|
|
// CHECK-PPC64: %[[new:.*]] = trunc i32 %{{.*}} to i24
|
|
// CHECK-PPC64: store i24 %[[new]], i24* %[[ptr]]
|
|
s->b = x;
|
|
}
|
|
}
|
|
|
|
namespace N5 {
|
|
// Widen through padding at the end of a struct even if that struct
|
|
// participates in a union with another struct which has a separate field in
|
|
// that location. The reasoning is that if the operation is storing to that
|
|
// member of the union, it must be the active member, and thus we can write
|
|
// through the padding. If it is a load, it might be a load of a common
|
|
// prefix through a non-active member, but in such a case the extra bits
|
|
// loaded are masked off anyways.
|
|
union U {
|
|
struct X { unsigned b : 24; char c; } x;
|
|
struct Y { unsigned b : 24; } y;
|
|
};
|
|
unsigned read(U* u) {
|
|
// CHECK-X86-64-LABEL: define i32 @_ZN2N54read
|
|
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
|
|
// CHECK-X86-64: %[[val:.*]] = load i32, i32* %[[ptr]]
|
|
// CHECK-X86-64: %[[and:.*]] = and i32 %[[val]], 16777215
|
|
// CHECK-X86-64: ret i32 %[[and]]
|
|
// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N54read
|
|
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
|
|
// CHECK-PPC64: %[[val:.*]] = load i32, i32* %[[ptr]]
|
|
// CHECK-PPC64: %[[shr:.*]] = lshr i32 %[[val]], 8
|
|
// CHECK-PPC64: ret i32 %[[shr]]
|
|
return u->y.b;
|
|
}
|
|
void write(U* u, unsigned x) {
|
|
// CHECK-X86-64-LABEL: define void @_ZN2N55write
|
|
// CHECK-X86-64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
|
|
// CHECK-X86-64: %[[old:.*]] = load i32, i32* %[[ptr]]
|
|
// CHECK-X86-64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
|
|
// CHECK-X86-64: %[[old_and:.*]] = and i32 %[[old]], -16777216
|
|
// CHECK-X86-64: %[[new:.*]] = or i32 %[[old_and]], %[[x_and]]
|
|
// CHECK-X86-64: store i32 %[[new]], i32* %[[ptr]]
|
|
// CHECK-PPC64-LABEL: define void @_ZN2N55write
|
|
// CHECK-PPC64: %[[ptr:.*]] = bitcast %{{.*}}* %{{.*}} to i32*
|
|
// CHECK-PPC64: %[[old:.*]] = load i32, i32* %[[ptr]]
|
|
// CHECK-PPC64: %[[x_and:.*]] = and i32 %{{.*}}, 16777215
|
|
// CHECK-PPC64: %[[x_shl:.*]] = shl i32 %[[x_and]], 8
|
|
// CHECK-PPC64: %[[old_and:.*]] = and i32 %[[old]], 255
|
|
// CHECK-PPC64: %[[new:.*]] = or i32 %[[old_and]], %[[x_shl]]
|
|
// CHECK-PPC64: store i32 %[[new]], i32* %[[ptr]]
|
|
u->y.b = x;
|
|
}
|
|
}
|
|
|
|
namespace N6 {
|
|
// Zero-length bitfields partition the memory locations of bitfields for the
|
|
// purposes of the memory model. That means stores must not span zero-length
|
|
// bitfields and loads may only span them when we are not instrumenting with
|
|
// ThreadSanitizer.
|
|
// FIXME: We currently don't widen loads even without ThreadSanitizer, even
|
|
// though we could.
|
|
struct S {
|
|
unsigned b1 : 24;
|
|
unsigned char : 0;
|
|
unsigned char b2 : 8;
|
|
};
|
|
unsigned read(S* s) {
|
|
// CHECK-X86-64-LABEL: define i32 @_ZN2N64read
|
|
// CHECK-X86-64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24*
|
|
// CHECK-X86-64: %[[val1:.*]] = load i24, i24* %[[ptr1]]
|
|
// CHECK-X86-64: %[[ext1:.*]] = zext i24 %[[val1]] to i32
|
|
// CHECK-X86-64: %[[ptr2:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-X86-64: %[[val2:.*]] = load i8, i8* %[[ptr2]]
|
|
// CHECK-X86-64: %[[ext2:.*]] = zext i8 %[[val2]] to i32
|
|
// CHECK-X86-64: %[[add:.*]] = add nsw i32 %[[ext1]], %[[ext2]]
|
|
// CHECK-X86-64: ret i32 %[[add]]
|
|
// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N64read
|
|
// CHECK-PPC64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24*
|
|
// CHECK-PPC64: %[[val1:.*]] = load i24, i24* %[[ptr1]]
|
|
// CHECK-PPC64: %[[ext1:.*]] = zext i24 %[[val1]] to i32
|
|
// CHECK-PPC64: %[[ptr2:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-PPC64: %[[val2:.*]] = load i8, i8* %[[ptr2]]
|
|
// CHECK-PPC64: %[[ext2:.*]] = zext i8 %[[val2]] to i32
|
|
// CHECK-PPC64: %[[add:.*]] = add nsw i32 %[[ext1]], %[[ext2]]
|
|
// CHECK-PPC64: ret i32 %[[add]]
|
|
return s->b1 + s->b2;
|
|
}
|
|
void write(S* s, unsigned x) {
|
|
// CHECK-X86-64-LABEL: define void @_ZN2N65write
|
|
// CHECK-X86-64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24*
|
|
// CHECK-X86-64: %[[new1:.*]] = trunc i32 %{{.*}} to i24
|
|
// CHECK-X86-64: store i24 %[[new1]], i24* %[[ptr1]]
|
|
// CHECK-X86-64: %[[new2:.*]] = trunc i32 %{{.*}} to i8
|
|
// CHECK-X86-64: %[[ptr2:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-X86-64: store i8 %[[new2]], i8* %[[ptr2]]
|
|
// CHECK-PPC64-LABEL: define void @_ZN2N65write
|
|
// CHECK-PPC64: %[[ptr1:.*]] = bitcast {{.*}}* %{{.*}} to i24*
|
|
// CHECK-PPC64: %[[new1:.*]] = trunc i32 %{{.*}} to i24
|
|
// CHECK-PPC64: store i24 %[[new1]], i24* %[[ptr1]]
|
|
// CHECK-PPC64: %[[new2:.*]] = trunc i32 %{{.*}} to i8
|
|
// CHECK-PPC64: %[[ptr2:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-PPC64: store i8 %[[new2]], i8* %[[ptr2]]
|
|
s->b1 = x;
|
|
s->b2 = x;
|
|
}
|
|
}
|
|
|
|
namespace N7 {
|
|
// Similar to N4 except that this adds a virtual base to the picture. (PR18430)
|
|
// Do NOT widen loads and stores to bitfields into padding at the end of
|
|
// a class which might end up with members inside of it when inside a derived
|
|
// class.
|
|
struct B1 {
|
|
virtual void f();
|
|
unsigned b1 : 24;
|
|
};
|
|
struct B2 : virtual B1 {
|
|
virtual ~B2();
|
|
unsigned b : 24;
|
|
};
|
|
// Imagine some other translation unit introduces:
|
|
#if 0
|
|
struct Derived : public B2 {
|
|
char c;
|
|
};
|
|
#endif
|
|
unsigned read(B2* s) {
|
|
// FIXME: We should widen this load as long as the function isn't being
|
|
// instrumented by ThreadSanitizer.
|
|
//
|
|
// CHECK-X86-64-LABEL: define i32 @_ZN2N74read
|
|
// CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
|
|
// CHECK-X86-64: %[[val:.*]] = load i24, i24* %[[ptr]]
|
|
// CHECK-X86-64: %[[ext:.*]] = zext i24 %[[val]] to i32
|
|
// CHECK-X86-64: ret i32 %[[ext]]
|
|
// CHECK-PPC64-LABEL: define zeroext i32 @_ZN2N74read
|
|
// CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
|
|
// CHECK-PPC64: %[[val:.*]] = load i24, i24* %[[ptr]]
|
|
// CHECK-PPC64: %[[ext:.*]] = zext i24 %[[val]] to i32
|
|
// CHECK-PPC64: ret i32 %[[ext]]
|
|
return s->b;
|
|
}
|
|
void write(B2* s, unsigned x) {
|
|
// CHECK-X86-64-LABEL: define void @_ZN2N75write
|
|
// CHECK-X86-64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-X86-64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
|
|
// CHECK-X86-64: %[[new:.*]] = trunc i32 %{{.*}} to i24
|
|
// CHECK-X86-64: store i24 %[[new]], i24* %[[ptr]]
|
|
// CHECK-PPC64-LABEL: define void @_ZN2N75write
|
|
// CHECK-PPC64: %[[gep:.*]] = getelementptr inbounds {{.*}}, {{.*}}* %{{.*}}, i32 0, i32 1
|
|
// CHECK-PPC64: %[[ptr:.*]] = bitcast [3 x i8]* %[[gep]] to i24*
|
|
// CHECK-PPC64: %[[new:.*]] = trunc i32 %{{.*}} to i24
|
|
// CHECK-PPC64: store i24 %[[new]], i24* %[[ptr]]
|
|
s->b = x;
|
|
}
|
|
}
|