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49 lines
1.7 KiB
49 lines
1.7 KiB
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o /dev/null 2>&1 | FileCheck -check-prefix=SI-ERR %s
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# SI-ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.rsq), %1:sgpr(s16) (in function: rsq_s16_vs)
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# SI-ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.rsq), %1:vgpr(s16) (in function: rsq_s16_vv)
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---
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name: rsq_s16_vs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: rsq_s16_vs
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; CHECK: liveins: $sgpr0
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; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; CHECK: %2:vgpr_32 = nofpexcept V_RSQ_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; CHECK: S_ENDPGM 0, implicit %2
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_TRUNC %0
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%2:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.rsq), %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: rsq_s16_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: rsq_s16_vv
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; CHECK: liveins: $vgpr0
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; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK: %2:vgpr_32 = nofpexcept V_RSQ_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; CHECK: S_ENDPGM 0, implicit %2
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s16) = G_TRUNC %0
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%2:vgpr(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.rsq), %1
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S_ENDPGM 0, implicit %2
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...
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