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199 lines
7.5 KiB
199 lines
7.5 KiB
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefixes=GCN
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---
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name: fmul_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4
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; GCN-LABEL: name: fmul_f32
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GCN: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
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; GCN: %4:vgpr_32 = nofpexcept V_MUL_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %5:vgpr_32 = nofpexcept V_MUL_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
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; GCN: %6:vgpr_32 = nofpexcept V_MUL_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $mode, implicit $exec
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; GCN: FLAT_STORE_DWORD [[COPY3]], %4, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY3]], %5, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY3]], %6, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(s32) = COPY $vgpr1
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%3:vgpr(p1) = COPY $vgpr3_vgpr4
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; fmul vs
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%4:vgpr(s32) = G_FMUL %1, %0
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; fmul sv
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%5:vgpr(s32) = G_FMUL %0, %1
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; fmul vv
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%6:vgpr(s32) = G_FMUL %1, %2
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G_STORE %4, %3 :: (store 4, addrspace 1)
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G_STORE %5, %3 :: (store 4, addrspace 1)
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G_STORE %6, %3 :: (store 4, addrspace 1)
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...
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---
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name: fmul_f64
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
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; GCN-LABEL: name: fmul_f64
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GCN: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GCN: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
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; GCN: %4:vreg_64 = nofpexcept V_MUL_F64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %5:vreg_64 = nofpexcept V_MUL_F64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
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; GCN: %6:vreg_64 = nofpexcept V_MUL_F64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $mode, implicit $exec
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; GCN: S_ENDPGM 0, implicit %4, implicit %5, implicit %6
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:vgpr(s64) = COPY $vgpr0_vgpr1
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%2:vgpr(s64) = COPY $vgpr2_vgpr3
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%3:vgpr(p1) = COPY $vgpr4_vgpr5
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; fmul vs
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%4:vgpr(s64) = G_FMUL %1, %0
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; fmul sv
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%5:vgpr(s64) = G_FMUL %0, %1
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; fmul vv
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%6:vgpr(s64) = G_FMUL %1, %2
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S_ENDPGM 0, implicit %4, implicit %5, implicit %6
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...
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---
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name: fmul_f16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4
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; GCN-LABEL: name: fmul_f16
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: %7:vgpr_32 = nofpexcept V_MUL_F16_e64 0, [[COPY]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %8:vgpr_32 = nofpexcept V_MUL_F16_e64 0, [[COPY]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %9:vgpr_32 = nofpexcept V_MUL_F16_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
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; GCN: S_ENDPGM 0, implicit %7, implicit %8, implicit %9
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(s32) = COPY $vgpr1
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%3:vgpr(p1) = COPY $vgpr3_vgpr4
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%4:sgpr(s16) = G_TRUNC %0
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%5:vgpr(s16) = G_TRUNC %1
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%6:vgpr(s16) = G_TRUNC %2
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; fmul vs
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%8:vgpr(s16) = G_FMUL %4, %4
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; fmul sv
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%9:vgpr(s16) = G_FMUL %4, %4
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; fmul vv
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%10:vgpr(s16) = G_FMUL %4, %5
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S_ENDPGM 0, implicit %8, implicit %9, implicit %10
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...
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---
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name: fmul_modifiers_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3
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; GCN-LABEL: name: fmul_modifiers_f32
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
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; GCN: %6:vgpr_32 = nofpexcept V_MUL_F32_e64 2, [[COPY]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %7:vgpr_32 = nofpexcept V_MUL_F32_e64 0, [[COPY]], 2, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %8:vgpr_32 = nofpexcept V_MUL_F32_e64 2, [[COPY]], 2, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %9:vgpr_32 = nofpexcept V_MUL_F32_e64 1, [[COPY]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %10:vgpr_32 = nofpexcept V_MUL_F32_e64 0, [[COPY]], 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %11:vgpr_32 = nofpexcept V_MUL_F32_e64 1, [[COPY]], 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %12:vgpr_32 = nofpexcept V_MUL_F32_e64 3, [[COPY]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %13:vgpr_32 = nofpexcept V_MUL_F32_e64 0, [[COPY]], 3, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %14:vgpr_32 = nofpexcept V_MUL_F32_e64 3, [[COPY]], 3, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: %15:vgpr_32 = nofpexcept V_MUL_F32_e64 3, [[COPY]], 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN: FLAT_STORE_DWORD [[COPY1]], %6, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %7, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %8, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %9, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %10, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %11, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %12, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %13, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %14, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY1]], %15, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(p1) = COPY $vgpr2_vgpr3
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%3:vgpr(s32) = G_FABS %0
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%4:vgpr(s32) = G_FNEG %0
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%5:vgpr(s32) = G_FNEG %3
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; fabs lhs
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%6:vgpr(s32) = G_FMUL %3, %0
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; fabs rhs
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%7:vgpr(s32) = G_FMUL %0, %3
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; fabs lhs, rhs
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%8:vgpr(s32) = G_FMUL %3, %3
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; fneg lhs
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%9:vgpr(s32) = G_FMUL %4, %0
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; fneg rhs
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%10:vgpr(s32) = G_FMUL %0, %4
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; fneg lhs, rhs
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%11:vgpr(s32) = G_FMUL %4, %4
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; fneg fabs lhs
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%12:vgpr(s32) = G_FMUL %5, %0
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; fneg fabs rhs
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%13:vgpr(s32) = G_FMUL %0, %5
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; fneg fabs lhs, rhs
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%14:vgpr(s32) = G_FMUL %5, %5
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; fneg fabs lhs, fneg rhs
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%15:vgpr(s32) = G_FMUL %5, %4
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G_STORE %6, %2 :: (store 4, addrspace 1)
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G_STORE %7, %2 :: (store 4, addrspace 1)
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G_STORE %8, %2 :: (store 4, addrspace 1)
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G_STORE %9, %2 :: (store 4, addrspace 1)
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G_STORE %10, %2 :: (store 4, addrspace 1)
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G_STORE %11, %2 :: (store 4, addrspace 1)
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G_STORE %12, %2 :: (store 4, addrspace 1)
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G_STORE %13, %2 :: (store 4, addrspace 1)
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G_STORE %14, %2 :: (store 4, addrspace 1)
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G_STORE %15, %2 :: (store 4, addrspace 1)
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...
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