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177 lines
6.9 KiB
177 lines
6.9 KiB
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -march=amdgcn -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX906 %s
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; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1011 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
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; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1012 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
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define float @v_fdot2(<2 x half> %a, <2 x half> %b, float %c) {
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; GFX906-LABEL: v_fdot2:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: v_dot2_f32_f16 v0, v0, v1, v2
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: v_dot2_f32_f16 v0, v0, v1, v2
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%r = call float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float %c, i1 false)
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ret float %r
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}
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define float @v_fdot2_clamp(<2 x half> %a, <2 x half> %b, float %c) {
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; GFX906-LABEL: v_fdot2_clamp:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: v_dot2_f32_f16 v0, v0, v1, v2 clamp
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2_clamp:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: v_dot2_f32_f16 v0, v0, v1, v2 clamp
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%r = call float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float %c, i1 true)
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ret float %r
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}
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define float @v_fdot2_neg_a(<2 x half> %a, <2 x half> %b, float %c) {
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; GFX906-LABEL: v_fdot2_neg_a:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: v_dot2_f32_f16 v0, v0, v1, v2 neg_lo:[1,0,0] neg_hi:[1,0,0]
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2_neg_a:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: v_dot2_f32_f16 v0, v0, v1, v2 neg_lo:[1,0,0] neg_hi:[1,0,0]
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%neg.a = fneg <2 x half> %a
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%r = call float @llvm.amdgcn.fdot2(<2 x half> %neg.a, <2 x half> %b, float %c, i1 false)
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ret float %r
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}
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define float @v_fdot2_neg_b(<2 x half> %a, <2 x half> %b, float %c) {
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; GFX906-LABEL: v_fdot2_neg_b:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: v_dot2_f32_f16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0]
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2_neg_b:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: v_dot2_f32_f16 v0, v0, v1, v2 neg_lo:[0,1,0] neg_hi:[0,1,0]
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%neg.b = fneg <2 x half> %b
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%r = call float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %neg.b, float %c, i1 false)
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ret float %r
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}
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define float @v_fdot2_neg_a_neg_b(<2 x half> %a, <2 x half> %b, float %c) {
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; GFX906-LABEL: v_fdot2_neg_a_neg_b:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: v_dot2_f32_f16 v0, v1, v1, v2 neg_lo:[1,1,0] neg_hi:[1,1,0]
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2_neg_a_neg_b:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: v_dot2_f32_f16 v0, v1, v1, v2 neg_lo:[1,1,0] neg_hi:[1,1,0]
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%neg.a = fneg <2 x half> %b
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%neg.b = fneg <2 x half> %b
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%r = call float @llvm.amdgcn.fdot2(<2 x half> %neg.a, <2 x half> %neg.b, float %c, i1 false)
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ret float %r
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}
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define float @v_fdot2_neg_c(<2 x half> %a, <2 x half> %b, float %c) {
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; GFX906-LABEL: v_fdot2_neg_c:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: v_xor_b32_e32 v2, 0x80000000, v2
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; GFX906-NEXT: v_dot2_f32_f16 v0, v0, v1, v2
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2_neg_c:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: v_xor_b32_e32 v2, 0x80000000, v2
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; GFX10-NEXT: v_dot2_f32_f16 v0, v0, v1, v2
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%neg.c = fneg float %c
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%r = call float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float %neg.c, i1 false)
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ret float %r
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}
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define float @v_fdot2_inline_literal_a(<2 x half> %b, float %c) {
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; GFX906-LABEL: v_fdot2_inline_literal_a:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: s_movk_i32 s4, 0x4000
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; GFX906-NEXT: s_pack_ll_b32_b16 s4, s4, s4
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; GFX906-NEXT: v_dot2_f32_f16 v0, s4, v0, v1
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2_inline_literal_a:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: s_movk_i32 s4, 0x4000
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; GFX10-NEXT: s_pack_ll_b32_b16 s4, s4, s4
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; GFX10-NEXT: v_dot2_f32_f16 v0, s4, v0, v1
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%ret = tail call float @llvm.amdgcn.fdot2(<2 x half> <half 2.0, half 2.0>, <2 x half> %b, float %c, i1 false)
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ret float %ret
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}
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define float @v_fdot2_inline_literal_b(<2 x half> %a, float %c) {
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; GFX906-LABEL: v_fdot2_inline_literal_b:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: s_movk_i32 s4, 0x4000
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; GFX906-NEXT: s_pack_ll_b32_b16 s4, s4, s4
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; GFX906-NEXT: v_dot2_f32_f16 v0, v0, s4, v1
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2_inline_literal_b:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: s_movk_i32 s4, 0x4000
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; GFX10-NEXT: s_pack_ll_b32_b16 s4, s4, s4
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; GFX10-NEXT: v_dot2_f32_f16 v0, v0, s4, v1
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%ret = tail call float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> <half 2.0, half 2.0>, float %c, i1 false)
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ret float %ret
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}
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define float @v_fdot2_inline_literal_c(<2 x half> %a, <2 x half> %b) {
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; GFX906-LABEL: v_fdot2_inline_literal_c:
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; GFX906: ; %bb.0:
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; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX906-NEXT: v_dot2_f32_f16 v0, v0, v1, 1.0
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; GFX906-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_fdot2_inline_literal_c:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: v_dot2_f32_f16 v0, v0, v1, 1.0
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%ret = tail call float @llvm.amdgcn.fdot2(<2 x half> %a, <2 x half> %b, float 1.0, i1 false)
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ret float %ret
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}
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declare float @llvm.amdgcn.fdot2(<2 x half>, <2 x half>, float, i1 immarg) #0
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attributes #0 = { nounwind readnone speculatable }
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