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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -o - %s -mtriple=thumbv7-- -run-pass=stack-protector -run-pass=prologepilog | FileCheck %s
---
# This should trigger an emergency spill in the register scavenger because the
# frame offset into the large argument is too large.
name: func0
tracksRegLiveness: true
fixedStack:
- { id: 0, offset: 4084, size: 4, alignment: 4, isImmutable: true,
isAliased: false }
- { id: 1, offset: -12, size: 4096, alignment: 4, isImmutable: false,
isAliased: false }
body: |
bb.0:
; CHECK-LABEL: name: func0
; CHECK: liveins: $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr
; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 36
; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -16
; CHECK: frame-setup CFI_INSTRUCTION offset $r11, -20
; CHECK: frame-setup CFI_INSTRUCTION offset $r10, -24
; CHECK: frame-setup CFI_INSTRUCTION offset $r9, -28
; CHECK: frame-setup CFI_INSTRUCTION offset $r8, -32
; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -36
; CHECK: frame-setup CFI_INSTRUCTION offset $r6, -40
; CHECK: frame-setup CFI_INSTRUCTION offset $r5, -44
; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -48
; CHECK: $sp = frame-setup tSUBspi $sp, 4, 14 /* CC::al */, $noreg
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 52
; CHECK: $r0 = IMPLICIT_DEF
; CHECK: $r1 = IMPLICIT_DEF
; CHECK: $r2 = IMPLICIT_DEF
; CHECK: $r3 = IMPLICIT_DEF
; CHECK: $r4 = IMPLICIT_DEF
; CHECK: $r5 = IMPLICIT_DEF
; CHECK: $r6 = IMPLICIT_DEF
; CHECK: $r7 = IMPLICIT_DEF
; CHECK: $r8 = IMPLICIT_DEF
; CHECK: $r9 = IMPLICIT_DEF
; CHECK: $r10 = IMPLICIT_DEF
; CHECK: $r11 = IMPLICIT_DEF
; CHECK: $r12 = IMPLICIT_DEF
; CHECK: $lr = IMPLICIT_DEF
; CHECK: t2STRi12 killed $r0, $sp, 0, 14 /* CC::al */, $noreg :: (store 4 into %stack.0)
; CHECK: $r0 = t2ADDri killed $sp, 4096, 14 /* CC::al */, $noreg, $noreg
; CHECK: $sp = t2LDRi12 killed $r0, 40, 14 /* CC::al */, $noreg :: (load 4)
; CHECK: $r0 = t2LDRi12 $sp, 0, 14 /* CC::al */, $noreg :: (load 4 from %stack.0)
; CHECK: KILL $r0
; CHECK: KILL $r1
; CHECK: KILL $r2
; CHECK: KILL $r3
; CHECK: KILL $r4
; CHECK: KILL $r5
; CHECK: KILL $r6
; CHECK: KILL $r7
; CHECK: KILL $r8
; CHECK: KILL $r9
; CHECK: KILL $r10
; CHECK: KILL $r11
; CHECK: KILL $r12
; CHECK: KILL $lr
$r0 = IMPLICIT_DEF
$r1 = IMPLICIT_DEF
$r2 = IMPLICIT_DEF
$r3 = IMPLICIT_DEF
$r4 = IMPLICIT_DEF
$r5 = IMPLICIT_DEF
$r6 = IMPLICIT_DEF
$r7 = IMPLICIT_DEF
$r8 = IMPLICIT_DEF
$r9 = IMPLICIT_DEF
$r10 = IMPLICIT_DEF
$r11 = IMPLICIT_DEF
$r12 = IMPLICIT_DEF
$lr = IMPLICIT_DEF
$sp = t2LDRi12 %fixed-stack.0, 0, 14, $noreg :: (load 4)
KILL $r0
KILL $r1
KILL $r2
KILL $r3
KILL $r4
KILL $r5
KILL $r6
KILL $r7
KILL $r8
KILL $r9
KILL $r10
KILL $r11
KILL $r12
KILL $lr
...
---
# This should not trigger an emergency spill yet.
name: func1
tracksRegLiveness: true
fixedStack:
- { id: 0, offset: 4044, size: 4, alignment: 4, isImmutable: true,
isAliased: false }
- { id: 1, offset: -12, size: 4056, alignment: 4, isImmutable: false,
isAliased: false }
body: |
bb.0:
; CHECK-LABEL: name: func1
; CHECK: liveins: $r4, $r5, $r6, $r8, $r9, $r10, $r11, $lr
; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 32
; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -16
; CHECK: frame-setup CFI_INSTRUCTION offset $r11, -20
; CHECK: frame-setup CFI_INSTRUCTION offset $r10, -24
; CHECK: frame-setup CFI_INSTRUCTION offset $r9, -28
; CHECK: frame-setup CFI_INSTRUCTION offset $r8, -32
; CHECK: frame-setup CFI_INSTRUCTION offset $r6, -36
; CHECK: frame-setup CFI_INSTRUCTION offset $r5, -40
; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -44
; CHECK: $sp = frame-setup tSUBspi $sp, 4, 14 /* CC::al */, $noreg
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 48
; CHECK: $r0 = IMPLICIT_DEF
; CHECK: $r1 = IMPLICIT_DEF
; CHECK: $r2 = IMPLICIT_DEF
; CHECK: $r3 = IMPLICIT_DEF
; CHECK: $r4 = IMPLICIT_DEF
; CHECK: $r5 = IMPLICIT_DEF
; CHECK: $r6 = IMPLICIT_DEF
; CHECK: $r8 = IMPLICIT_DEF
; CHECK: $r9 = IMPLICIT_DEF
; CHECK: $r10 = IMPLICIT_DEF
; CHECK: $r11 = IMPLICIT_DEF
; CHECK: $r12 = IMPLICIT_DEF
; CHECK: $lr = IMPLICIT_DEF
; CHECK: $r11 = t2LDRi12 $sp, 4092, 14 /* CC::al */, $noreg :: (load 4)
; CHECK: KILL $r0
; CHECK: KILL $r1
; CHECK: KILL $r2
; CHECK: KILL $r3
; CHECK: KILL $r4
; CHECK: KILL $r5
; CHECK: KILL $r6
; CHECK: KILL $r8
; CHECK: KILL $r9
; CHECK: KILL $r10
; CHECK: KILL $r11
; CHECK: KILL $r12
; CHECK: KILL $lr
$r0 = IMPLICIT_DEF
$r1 = IMPLICIT_DEF
$r2 = IMPLICIT_DEF
$r3 = IMPLICIT_DEF
$r4 = IMPLICIT_DEF
$r5 = IMPLICIT_DEF
$r6 = IMPLICIT_DEF
$r8 = IMPLICIT_DEF
$r9 = IMPLICIT_DEF
$r10 = IMPLICIT_DEF
$r11 = IMPLICIT_DEF
$r12 = IMPLICIT_DEF
$lr = IMPLICIT_DEF
$r11 = t2LDRi12 %fixed-stack.0, 0, 14, $noreg :: (load 4)
KILL $r0
KILL $r1
KILL $r2
KILL $r3
KILL $r4
KILL $r5
KILL $r6
KILL $r8
KILL $r9
KILL $r10
KILL $r11
KILL $r12
KILL $lr
...