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140 lines
5.3 KiB
140 lines
5.3 KiB
; RUN: llc < %s -march=avr -mcpu=atmega328 | FileCheck %s
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; This test case is designed to trigger a bug caused by the register
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; allocator not handling the case where a target generates a load/store with
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; a frame index that happens to be an earlyclobber instruction.
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;
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; It is taken from the translated LLVM IR of the Rust core library.
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;
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; The error message looked like
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; Assertion failed: (MI && "No instruction defining live value"), function computeDeadValues
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;
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; See PR13375 for details.
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%values = type { i16, [2 x i8], [40 x i32], [0 x i8] }
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@POW10TO128 = external constant [14 x i32], align 4
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; CHECK: core_num_flt2dec_strategy_dragon
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define nonnull dereferenceable(164) %values* @core_num_flt2dec_strategy_dragon(%values* returned dereferenceable(164) %arg, i16 %arg1) unnamed_addr {
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start:
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%ret.i = alloca [40 x i32], align 4
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%tmp = icmp eq i16 undef, 0
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br i1 %tmp, label %bb5, label %bb1
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bb1:
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unreachable
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bb5:
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br i1 undef, label %bb14, label %bb11
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bb11:
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unreachable
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bb14:
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%tmp2 = bitcast [40 x i32]* %ret.i to i8*
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call void @llvm.memset.p0i8.i16(i8* align 4 %tmp2, i8 0, i16 160, i1 false)
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%tmp3 = getelementptr inbounds %values, %values* %arg, i16 0, i32 0
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%tmp4 = load i16, i16* %tmp3, align 2
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%tmp5 = icmp ult i16 %tmp4, 14
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%tmp6 = getelementptr inbounds %values, %values* %arg, i16 0, i32 2, i16 0
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br i1 %tmp5, label %bb2.i38, label %bb3.i39
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bb2.i38:
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%tmp7 = getelementptr inbounds %values, %values* %arg, i16 0, i32 2, i16 %tmp4
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%tmp8 = ptrtoint i32* %tmp6 to i16
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br label %bb4.outer.i122
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bb4.outer.i122:
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%iter.sroa.0.0.ph.i119 = phi i16 [ %tmp12, %bb24.i141 ], [ %tmp8, %bb2.i38 ]
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%retsz.0.ph.i121 = phi i16 [ %.retsz.0.i140, %bb24.i141 ], [ 0, %bb2.i38 ]
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br label %bb4.i125
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bb4.i125:
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%iter.sroa.0.0.i123 = phi i16 [ %tmp12, %core.iter.Enumerate.ALPHA ], [ %iter.sroa.0.0.ph.i119, %bb4.outer.i122 ]
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%tmp9 = inttoptr i16 %iter.sroa.0.0.i123 to i32*
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%tmp10 = icmp eq i32* %tmp9, %tmp7
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br i1 %tmp10, label %core.num.bignum.Big32x40.exit44, label %core.iter.Enumerate.ALPHA
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core.iter.Enumerate.ALPHA:
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%tmp11 = getelementptr inbounds i32, i32* %tmp9, i16 1
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%tmp12 = ptrtoint i32* %tmp11 to i16
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%tmp13 = load i32, i32* %tmp9, align 4
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%tmp14 = icmp eq i32 %tmp13, 0
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br i1 %tmp14, label %bb4.i125, label %core..iter..Enumerate.exit17
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core..iter..Enumerate.exit17:
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%tmp15 = zext i32 %tmp13 to i64
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br label %core..iter..Enumerate.exit17.i132
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core..iter..Enumerate.exit17.i132:
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%carry.085.i129 = phi i32 [ 0, %core..iter..Enumerate.exit17 ], [ %tmp28, %core_slice_IndexMut.exit13 ]
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%tmp16 = icmp ult i16 undef, 40
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br i1 %tmp16, label %core_slice_IndexMut.exit13, label %panic.i.i14.i134
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bb16.i133:
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%tmp17 = icmp eq i32 %tmp28, 0
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br i1 %tmp17, label %bb24.i141, label %bb21.i136
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panic.i.i14.i134:
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unreachable
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core_slice_IndexMut.exit13:
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%tmp18 = load i32, i32* null, align 4
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%tmp19 = getelementptr inbounds [40 x i32], [40 x i32]* %ret.i, i16 0, i16 undef
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%tmp20 = load i32, i32* %tmp19, align 4
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%tmp21 = zext i32 %tmp18 to i64
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%tmp22 = mul nuw i64 %tmp21, %tmp15
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%tmp23 = zext i32 %tmp20 to i64
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%tmp24 = zext i32 %carry.085.i129 to i64
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%tmp25 = add nuw nsw i64 %tmp23, %tmp24
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%tmp26 = add i64 %tmp25, %tmp22
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%tmp27 = lshr i64 %tmp26, 32
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%tmp28 = trunc i64 %tmp27 to i32
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%tmp29 = icmp eq i32* undef, getelementptr inbounds ([14 x i32], [14 x i32]* @POW10TO128, i16 1, i16 0)
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br i1 %tmp29, label %bb16.i133, label %core..iter..Enumerate.exit17.i132
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bb21.i136:
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%tmp30 = icmp ult i16 undef, 40
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br i1 %tmp30, label %"_ZN4core5slice70_$LT$impl$u20$core..ops..IndexMut$LT$I$GT$$u20$for$u20$$u5b$T$u5d$$GT$9index_mut17h8eccc0af1ec6f971E.exit.i138", label %panic.i.i.i137
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panic.i.i.i137:
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unreachable
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"_ZN4core5slice70_$LT$impl$u20$core..ops..IndexMut$LT$I$GT$$u20$for$u20$$u5b$T$u5d$$GT$9index_mut17h8eccc0af1ec6f971E.exit.i138":
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store i32 %tmp28, i32* undef, align 4
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br label %bb24.i141
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bb24.i141:
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%sz.0.i139 = phi i16 [ 15, %"_ZN4core5slice70_$LT$impl$u20$core..ops..IndexMut$LT$I$GT$$u20$for$u20$$u5b$T$u5d$$GT$9index_mut17h8eccc0af1ec6f971E.exit.i138" ], [ 14, %bb16.i133 ]
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%tmp31 = add i16 %sz.0.i139, 0
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%tmp32 = icmp ult i16 %retsz.0.ph.i121, %tmp31
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%.retsz.0.i140 = select i1 %tmp32, i16 %tmp31, i16 %retsz.0.ph.i121
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br label %bb4.outer.i122
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bb3.i39:
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%tmp33 = call fastcc i16 @_ZN4core3num6bignum8Big32x4010mul_digits9mul_inner17h5d3461bce04d16ccE([40 x i32]* nonnull dereferenceable(160) %ret.i, i32* noalias nonnull readonly getelementptr inbounds ([14 x i32], [14 x i32]* @POW10TO128, i16 0, i16 0), i16 14, i32* noalias nonnull readonly %tmp6, i16 %tmp4)
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br label %core.num.bignum.Big32x40.exit44
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core.num.bignum.Big32x40.exit44:
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%retsz.0.i40 = phi i16 [ %tmp33, %bb3.i39 ], [ %retsz.0.ph.i121, %bb4.i125 ]
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call void @llvm.memcpy.p0i8.p0i8.i16(i8* align 4 undef, i8* align 4 %tmp2, i16 160, i1 false)
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store i16 %retsz.0.i40, i16* %tmp3, align 2
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%tmp34 = and i16 %arg1, 256
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%tmp35 = icmp eq i16 %tmp34, 0
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br i1 %tmp35, label %bb30, label %bb27
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bb27:
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unreachable
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bb30:
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ret %values* %arg
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}
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declare fastcc i16 @_ZN4core3num6bignum8Big32x4010mul_digits9mul_inner17h5d3461bce04d16ccE([40 x i32]* nocapture dereferenceable(160), i32* noalias nonnull readonly, i16, i32* noalias nonnull readonly, i16)
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declare void @llvm.memset.p0i8.i16(i8* nocapture writeonly, i8, i16, i1)
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declare void @llvm.memcpy.p0i8.p0i8.i16(i8* nocapture writeonly, i8* nocapture readonly, i16, i1)
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