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148 lines
5.4 KiB
148 lines
5.4 KiB
; REQUIRES: asserts
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; RUN: llc -march=hexagon -enable-pipeliner -enable-aa-sched-mi < %s -pipeliner-experimental-cg=true | FileCheck %s
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; CHECK: loop0(
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; CHECK: loop0(.LBB0_[[LOOP:.]],
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; CHECK: .LBB0_[[LOOP]]:
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; CHECK: or
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; CHECK: or
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; CHECK: }
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; CHECK: {
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; CHECK: }
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; CHECK: {
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; CHECK: memw
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; CHECK-NEXT: }{{[ \t]*}}:endloop0
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; Function Attrs: nounwind
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define void @f0([576 x i32]* nocapture %a0, i32 %a1, i32* nocapture %a2) #0 {
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b0:
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%v0 = icmp sgt i32 %a1, 0
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br i1 %v0, label %b1, label %b9
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b1: ; preds = %b0
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%v1 = icmp ugt i32 %a1, 3
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%v2 = add i32 %a1, -3
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br i1 %v1, label %b2, label %b5
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b2: ; preds = %b1
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br label %b3
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b3: ; preds = %b3, %b2
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%v3 = phi i32 [ %v48, %b3 ], [ 0, %b2 ]
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%v4 = phi i32 [ %v46, %b3 ], [ 0, %b2 ]
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%v5 = phi i32 [ %v49, %b3 ], [ 0, %b2 ]
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%v6 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 0, i32 %v5
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%v7 = load i32, i32* %v6, align 4, !tbaa !0
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%v8 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 1, i32 %v5
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%v9 = load i32, i32* %v8, align 4, !tbaa !0
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%v10 = add nsw i32 %v9, %v7
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store i32 %v10, i32* %v6, align 4, !tbaa !0
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%v11 = sub nsw i32 %v7, %v9
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store i32 %v11, i32* %v8, align 4, !tbaa !0
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%v12 = tail call i32 @llvm.hexagon.A2.abs(i32 %v10)
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%v13 = or i32 %v12, %v4
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%v14 = tail call i32 @llvm.hexagon.A2.abs(i32 %v11)
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%v15 = or i32 %v14, %v3
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%v16 = add nsw i32 %v5, 1
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%v17 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 0, i32 %v16
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%v18 = load i32, i32* %v17, align 4, !tbaa !0
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%v19 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 1, i32 %v16
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%v20 = load i32, i32* %v19, align 4, !tbaa !0
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%v21 = add nsw i32 %v20, %v18
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store i32 %v21, i32* %v17, align 4, !tbaa !0
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%v22 = sub nsw i32 %v18, %v20
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store i32 %v22, i32* %v19, align 4, !tbaa !0
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%v23 = tail call i32 @llvm.hexagon.A2.abs(i32 %v21)
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%v24 = or i32 %v23, %v13
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%v25 = tail call i32 @llvm.hexagon.A2.abs(i32 %v22)
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%v26 = or i32 %v25, %v15
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%v27 = add nsw i32 %v5, 2
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%v28 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 0, i32 %v27
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%v29 = load i32, i32* %v28, align 4, !tbaa !0
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%v30 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 1, i32 %v27
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%v31 = load i32, i32* %v30, align 4, !tbaa !0
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%v32 = add nsw i32 %v31, %v29
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store i32 %v32, i32* %v28, align 4, !tbaa !0
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%v33 = sub nsw i32 %v29, %v31
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store i32 %v33, i32* %v30, align 4, !tbaa !0
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%v34 = tail call i32 @llvm.hexagon.A2.abs(i32 %v32)
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%v35 = or i32 %v34, %v24
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%v36 = tail call i32 @llvm.hexagon.A2.abs(i32 %v33)
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%v37 = or i32 %v36, %v26
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%v38 = add nsw i32 %v5, 3
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%v39 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 0, i32 %v38
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%v40 = load i32, i32* %v39, align 4, !tbaa !0
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%v41 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 1, i32 %v38
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%v42 = load i32, i32* %v41, align 4, !tbaa !0
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%v43 = add nsw i32 %v42, %v40
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store i32 %v43, i32* %v39, align 4, !tbaa !0
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%v44 = sub nsw i32 %v40, %v42
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store i32 %v44, i32* %v41, align 4, !tbaa !0
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%v45 = tail call i32 @llvm.hexagon.A2.abs(i32 %v43)
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%v46 = or i32 %v45, %v35
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%v47 = tail call i32 @llvm.hexagon.A2.abs(i32 %v44)
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%v48 = or i32 %v47, %v37
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%v49 = add nsw i32 %v5, 4
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%v50 = icmp slt i32 %v49, %v2
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br i1 %v50, label %b3, label %b4
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b4: ; preds = %b3
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br label %b5
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b5: ; preds = %b4, %b1
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%v51 = phi i32 [ 0, %b1 ], [ %v49, %b4 ]
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%v52 = phi i32 [ 0, %b1 ], [ %v48, %b4 ]
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%v53 = phi i32 [ 0, %b1 ], [ %v46, %b4 ]
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%v54 = icmp eq i32 %v51, %a1
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br i1 %v54, label %b9, label %b6
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b6: ; preds = %b5
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br label %b7
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b7: ; preds = %b7, %b6
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%v55 = phi i32 [ %v67, %b7 ], [ %v52, %b6 ]
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%v56 = phi i32 [ %v65, %b7 ], [ %v53, %b6 ]
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%v57 = phi i32 [ %v68, %b7 ], [ %v51, %b6 ]
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%v58 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 0, i32 %v57
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%v59 = load i32, i32* %v58, align 4, !tbaa !0
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%v60 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 1, i32 %v57
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%v61 = load i32, i32* %v60, align 4, !tbaa !0
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%v62 = add nsw i32 %v61, %v59
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store i32 %v62, i32* %v58, align 4, !tbaa !0
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%v63 = sub nsw i32 %v59, %v61
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store i32 %v63, i32* %v60, align 4, !tbaa !0
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%v64 = tail call i32 @llvm.hexagon.A2.abs(i32 %v62)
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%v65 = or i32 %v64, %v56
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%v66 = tail call i32 @llvm.hexagon.A2.abs(i32 %v63)
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%v67 = or i32 %v66, %v55
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%v68 = add nsw i32 %v57, 1
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%v69 = icmp eq i32 %v68, %a1
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br i1 %v69, label %b8, label %b7
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b8: ; preds = %b7
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br label %b9
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b9: ; preds = %b8, %b5, %b0
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%v70 = phi i32 [ 0, %b0 ], [ %v52, %b5 ], [ %v67, %b8 ]
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%v71 = phi i32 [ 0, %b0 ], [ %v53, %b5 ], [ %v65, %b8 ]
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%v72 = load i32, i32* %a2, align 4, !tbaa !0
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%v73 = or i32 %v72, %v71
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store i32 %v73, i32* %a2, align 4, !tbaa !0
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%v74 = getelementptr inbounds i32, i32* %a2, i32 1
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%v75 = load i32, i32* %v74, align 4, !tbaa !0
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%v76 = or i32 %v75, %v70
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store i32 %v76, i32* %v74, align 4, !tbaa !0
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ret void
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.hexagon.A2.abs(i32) #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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