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85 lines
4.1 KiB
85 lines
4.1 KiB
// RUN: mlir-translate -mlir-to-nvvmir %s | FileCheck %s
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llvm.func @nvvm_special_regs() -> !llvm.i32 {
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// CHECK: %1 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
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%1 = nvvm.read.ptx.sreg.tid.x : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.tid.y()
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%2 = nvvm.read.ptx.sreg.tid.y : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.tid.z()
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%3 = nvvm.read.ptx.sreg.tid.z : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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%4 = nvvm.read.ptx.sreg.ntid.x : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.ntid.y()
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%5 = nvvm.read.ptx.sreg.ntid.y : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.ntid.z()
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%6 = nvvm.read.ptx.sreg.ntid.z : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()
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%7 = nvvm.read.ptx.sreg.ctaid.x : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.ctaid.y()
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%8 = nvvm.read.ptx.sreg.ctaid.y : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.ctaid.z()
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%9 = nvvm.read.ptx.sreg.ctaid.z : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.x()
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%10 = nvvm.read.ptx.sreg.nctaid.x : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.y()
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%11 = nvvm.read.ptx.sreg.nctaid.y : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.z()
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%12 = nvvm.read.ptx.sreg.nctaid.z : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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%13 = nvvm.read.ptx.sreg.warpsize : !llvm.i32
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// CHECK: call i32 @llvm.nvvm.read.ptx.sreg.laneid()
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%14 = nvvm.read.ptx.sreg.laneid : !llvm.i32
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llvm.return %1 : !llvm.i32
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}
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llvm.func @llvm.nvvm.barrier0() {
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// CHECK: call void @llvm.nvvm.barrier0()
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nvvm.barrier0
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llvm.return
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}
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llvm.func @nvvm_shfl(
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%0 : !llvm.i32, %1 : !llvm.i32, %2 : !llvm.i32,
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%3 : !llvm.i32, %4 : !llvm.float) -> !llvm.i32 {
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// CHECK: call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%6 = nvvm.shfl.sync.bfly %0, %3, %1, %2 : !llvm.i32
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// CHECK: call float @llvm.nvvm.shfl.sync.bfly.f32(i32 %{{.*}}, float %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%7 = nvvm.shfl.sync.bfly %0, %4, %1, %2 : !llvm.float
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llvm.return %6 : !llvm.i32
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}
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llvm.func @nvvm_shfl_pred(
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%0 : !llvm.i32, %1 : !llvm.i32, %2 : !llvm.i32,
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%3 : !llvm.i32, %4 : !llvm.float) -> !llvm.struct<(i32, i1)> {
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// CHECK: call { i32, i1 } @llvm.nvvm.shfl.sync.bfly.i32p(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%6 = nvvm.shfl.sync.bfly %0, %3, %1, %2 {return_value_and_is_valid} : !llvm.struct<(i32, i1)>
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// CHECK: call { float, i1 } @llvm.nvvm.shfl.sync.bfly.f32p(i32 %{{.*}}, float %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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%7 = nvvm.shfl.sync.bfly %0, %4, %1, %2 {return_value_and_is_valid} : !llvm.struct<(float, i1)>
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llvm.return %6 : !llvm.struct<(i32, i1)>
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}
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llvm.func @nvvm_vote(%0 : !llvm.i32, %1 : !llvm.i1) -> !llvm.i32 {
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// CHECK: call i32 @llvm.nvvm.vote.ballot.sync(i32 %{{.*}}, i1 %{{.*}})
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%3 = nvvm.vote.ballot.sync %0, %1 : !llvm.i32
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llvm.return %3 : !llvm.i32
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}
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llvm.func @nvvm_mma(%a0 : !llvm.vec<2 x half>, %a1 : !llvm.vec<2 x half>,
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%b0 : !llvm.vec<2 x half>, %b1 : !llvm.vec<2 x half>,
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%c0 : !llvm.float, %c1 : !llvm.float, %c2 : !llvm.float, %c3 : !llvm.float,
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%c4 : !llvm.float, %c5 : !llvm.float, %c6 : !llvm.float, %c7 : !llvm.float) {
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// CHECK: call { float, float, float, float, float, float, float, float } @llvm.nvvm.mma.m8n8k4.row.col.f32.f32
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%0 = nvvm.mma.sync %a0, %a1, %b0, %b1, %c0, %c1, %c2, %c3, %c4, %c5, %c6, %c7 {alayout="row", blayout="col"} : (!llvm.vec<2 x half>, !llvm.vec<2 x half>, !llvm.vec<2 x half>, !llvm.vec<2 x half>, !llvm.float, !llvm.float, !llvm.float, !llvm.float, !llvm.float, !llvm.float, !llvm.float, !llvm.float) -> !llvm.struct<(float, float, float, float, float, float, float, float)>
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llvm.return %0 : !llvm.struct<(float, float, float, float, float, float, float, float)>
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}
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// This function has the "kernel" attribute attached and should appear in the
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// NVVM annotations after conversion.
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llvm.func @kernel_func() attributes {gpu.kernel} {
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llvm.return
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}
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// CHECK: !nvvm.annotations =
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// CHECK-NOT: {i32 ()* @nvvm_special_regs, !"kernel", i32 1}
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// CHECK: {void ()* @kernel_func, !"kernel", i32 1}
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