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237 lines
7.8 KiB
237 lines
7.8 KiB
//===------------------------ CalcSpillWeights.cpp ------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/VirtRegMap.h"
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#include "llvm/CodeGen/CalcSpillWeights.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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#define DEBUG_TYPE "calcspillweights"
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void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS,
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MachineFunction &MF,
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VirtRegMap *VRM,
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const MachineLoopInfo &MLI,
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const MachineBlockFrequencyInfo &MBFI,
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VirtRegAuxInfo::NormalizingFn norm) {
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DEBUG(dbgs() << "********** Compute Spill Weights **********\n"
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<< "********** Function: " << MF.getName() << '\n');
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MachineRegisterInfo &MRI = MF.getRegInfo();
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VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm);
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for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
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unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
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if (MRI.reg_nodbg_empty(Reg))
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continue;
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VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg));
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}
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}
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// Return the preferred allocation register for reg, given a COPY instruction.
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static unsigned copyHint(const MachineInstr *mi, unsigned reg,
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const TargetRegisterInfo &tri,
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const MachineRegisterInfo &mri) {
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unsigned sub, hreg, hsub;
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if (mi->getOperand(0).getReg() == reg) {
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sub = mi->getOperand(0).getSubReg();
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hreg = mi->getOperand(1).getReg();
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hsub = mi->getOperand(1).getSubReg();
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} else {
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sub = mi->getOperand(1).getSubReg();
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hreg = mi->getOperand(0).getReg();
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hsub = mi->getOperand(0).getSubReg();
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}
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if (!hreg)
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return 0;
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if (TargetRegisterInfo::isVirtualRegister(hreg))
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return sub == hsub ? hreg : 0;
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const TargetRegisterClass *rc = mri.getRegClass(reg);
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// Only allow physreg hints in rc.
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if (sub == 0)
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return rc->contains(hreg) ? hreg : 0;
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// reg:sub should match the physreg hreg.
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return tri.getMatchingSuperReg(hreg, sub, rc);
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}
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// Check if all values in LI are rematerializable
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static bool isRematerializable(const LiveInterval &LI,
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const LiveIntervals &LIS,
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VirtRegMap *VRM,
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const TargetInstrInfo &TII) {
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unsigned Reg = LI.reg;
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unsigned Original = VRM ? VRM->getOriginal(Reg) : 0;
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for (LiveInterval::const_vni_iterator I = LI.vni_begin(), E = LI.vni_end();
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I != E; ++I) {
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const VNInfo *VNI = *I;
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if (VNI->isUnused())
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continue;
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if (VNI->isPHIDef())
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return false;
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MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
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assert(MI && "Dead valno in interval");
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// Trace copies introduced by live range splitting. The inline
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// spiller can rematerialize through these copies, so the spill
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// weight must reflect this.
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if (VRM) {
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while (MI->isFullCopy()) {
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// The copy destination must match the interval register.
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if (MI->getOperand(0).getReg() != Reg)
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return false;
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// Get the source register.
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Reg = MI->getOperand(1).getReg();
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// If the original (pre-splitting) registers match this
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// copy came from a split.
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if (!TargetRegisterInfo::isVirtualRegister(Reg) ||
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VRM->getOriginal(Reg) != Original)
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return false;
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// Follow the copy live-in value.
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const LiveInterval &SrcLI = LIS.getInterval(Reg);
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LiveQueryResult SrcQ = SrcLI.Query(VNI->def);
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VNI = SrcQ.valueIn();
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assert(VNI && "Copy from non-existing value");
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if (VNI->isPHIDef())
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return false;
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MI = LIS.getInstructionFromIndex(VNI->def);
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assert(MI && "Dead valno in interval");
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}
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}
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if (!TII.isTriviallyReMaterializable(*MI, LIS.getAliasAnalysis()))
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return false;
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}
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return true;
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}
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void
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VirtRegAuxInfo::calculateSpillWeightAndHint(LiveInterval &li) {
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MachineRegisterInfo &mri = MF.getRegInfo();
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const TargetRegisterInfo &tri = *MF.getSubtarget().getRegisterInfo();
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MachineBasicBlock *mbb = nullptr;
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MachineLoop *loop = nullptr;
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bool isExiting = false;
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float totalWeight = 0;
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unsigned numInstr = 0; // Number of instructions using li
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SmallPtrSet<MachineInstr*, 8> visited;
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// Find the best physreg hint and the best virtreg hint.
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float bestPhys = 0, bestVirt = 0;
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unsigned hintPhys = 0, hintVirt = 0;
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// Don't recompute a target specific hint.
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bool noHint = mri.getRegAllocationHint(li.reg).first != 0;
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// Don't recompute spill weight for an unspillable register.
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bool Spillable = li.isSpillable();
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for (MachineRegisterInfo::reg_instr_iterator
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I = mri.reg_instr_begin(li.reg), E = mri.reg_instr_end();
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I != E; ) {
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MachineInstr *mi = &*(I++);
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numInstr++;
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if (mi->isIdentityCopy() || mi->isImplicitDef() || mi->isDebugValue())
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continue;
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if (!visited.insert(mi).second)
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continue;
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float weight = 1.0f;
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if (Spillable) {
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// Get loop info for mi.
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if (mi->getParent() != mbb) {
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mbb = mi->getParent();
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loop = Loops.getLoopFor(mbb);
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isExiting = loop ? loop->isLoopExiting(mbb) : false;
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}
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// Calculate instr weight.
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bool reads, writes;
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std::tie(reads, writes) = mi->readsWritesVirtualRegister(li.reg);
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weight = LiveIntervals::getSpillWeight(writes, reads, &MBFI, *mi);
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// Give extra weight to what looks like a loop induction variable update.
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if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb))
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weight *= 3;
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totalWeight += weight;
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}
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// Get allocation hints from copies.
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if (noHint || !mi->isCopy())
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continue;
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unsigned hint = copyHint(mi, li.reg, tri, mri);
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if (!hint)
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continue;
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// Force hweight onto the stack so that x86 doesn't add hidden precision,
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// making the comparison incorrectly pass (i.e., 1 > 1 == true??).
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//
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// FIXME: we probably shouldn't use floats at all.
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volatile float hweight = Hint[hint] += weight;
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if (TargetRegisterInfo::isPhysicalRegister(hint)) {
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if (hweight > bestPhys && mri.isAllocatable(hint)) {
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bestPhys = hweight;
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hintPhys = hint;
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}
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} else {
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if (hweight > bestVirt) {
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bestVirt = hweight;
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hintVirt = hint;
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}
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}
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}
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Hint.clear();
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// Always prefer the physreg hint.
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if (unsigned hint = hintPhys ? hintPhys : hintVirt) {
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mri.setRegAllocationHint(li.reg, 0, hint);
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// Weakly boost the spill weight of hinted registers.
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totalWeight *= 1.01F;
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}
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// If the live interval was already unspillable, leave it that way.
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if (!Spillable)
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return;
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// Mark li as unspillable if all live ranges are tiny and the interval
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// is not live at any reg mask. If the interval is live at a reg mask
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// spilling may be required.
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if (li.isZeroLength(LIS.getSlotIndexes()) &&
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!li.isLiveAtIndexes(LIS.getRegMaskSlots())) {
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li.markNotSpillable();
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return;
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}
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// If all of the definitions of the interval are re-materializable,
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// it is a preferred candidate for spilling.
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// FIXME: this gets much more complicated once we support non-trivial
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// re-materialization.
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if (isRematerializable(li, LIS, VRM, *MF.getSubtarget().getInstrInfo()))
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totalWeight *= 0.5F;
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li.weight = normalize(totalWeight, li.getSize(), numInstr);
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}
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