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83 lines
2.4 KiB
83 lines
2.4 KiB
; RUN: opt -S -codegenprepare -mtriple=aarch64-linux %s | FileCheck %s
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; Test for CodeGenPrepare::optimizeLoadExt(): simple case: two loads
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; feeding a phi that zext's each loaded value.
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define i32 @test_free_zext(i32* %ptr, i32* %ptr2, i32 %c) {
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; CHECK-LABEL: @test_free_zext(
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bb1:
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; CHECK-LABEL: bb1:
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; CHECK: %[[T1:.*]] = load
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; CHECK: %[[A1:.*]] = and i32 %[[T1]], 65535
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%load1 = load i32, i32* %ptr, align 4
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%cmp = icmp ne i32 %c, 0
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br i1 %cmp, label %bb2, label %bb3
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bb2:
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; CHECK-LABEL: bb2:
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; CHECK: %[[T2:.*]] = load
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; CHECK: %[[A2:.*]] = and i32 %[[T2]], 65535
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%load2 = load i32, i32* %ptr2, align 4
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br label %bb3
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bb3:
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; CHECK-LABEL: bb3:
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; CHECK: phi i32 [ %[[A1]], %bb1 ], [ %[[A2]], %bb2 ]
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%phi = phi i32 [ %load1, %bb1 ], [ %load2, %bb2 ]
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%and = and i32 %phi, 65535
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ret i32 %and
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}
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; Test for CodeGenPrepare::optimizeLoadExt(): exercise all opcode
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; cases of active bit calculation.
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define i32 @test_free_zext2(i32* %ptr, i16* %dst16, i32* %dst32, i32 %c) {
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; CHECK-LABEL: @test_free_zext2(
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bb1:
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; CHECK-LABEL: bb1:
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; CHECK: %[[T1:.*]] = load
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; CHECK: %[[A1:.*]] = and i32 %[[T1]], 65535
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%load1 = load i32, i32* %ptr, align 4
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%cmp = icmp ne i32 %c, 0
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br i1 %cmp, label %bb2, label %bb4
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bb2:
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; CHECK-LABEL: bb2:
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%trunc = trunc i32 %load1 to i16
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store i16 %trunc, i16* %dst16, align 2
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br i1 %cmp, label %bb3, label %bb4
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bb3:
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; CHECK-LABEL: bb3:
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%shl = shl i32 %load1, 16
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store i32 %shl, i32* %dst32, align 4
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br label %bb4
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bb4:
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; CHECK-LABEL: bb4:
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; CHECK-NOT: and
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; CHECK: ret i32 %[[A1]]
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%and = and i32 %load1, 65535
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ret i32 %and
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}
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; Test for CodeGenPrepare::optimizeLoadExt(): check case of zext-able
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; load feeding a phi in the same block.
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define void @test_free_zext3(i32* %ptr, i32* %ptr2, i32* %dst, i64* %c) {
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; CHECK-LABEL: @test_free_zext3(
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bb1:
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; CHECK-LABEL: bb1:
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; CHECK: %[[T1:.*]] = load
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; CHECK: %[[A1:.*]] = and i32 %[[T1]], 65535
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%load1 = load i32, i32* %ptr, align 4
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br label %loop
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loop:
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; CHECK-LABEL: loop:
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; CHECK: phi i32 [ %[[A1]], %bb1 ], [ %[[A2]], %loop ]
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%phi = phi i32 [ %load1, %bb1 ], [ %load2, %loop ]
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%and = and i32 %phi, 65535
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store i32 %and, i32* %dst, align 4
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%idx = load volatile i64, i64* %c, align 4
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%addr = getelementptr inbounds i32, i32* %ptr2, i64 %idx
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; CHECK: %[[T2:.*]] = load i32
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; CHECK: %[[A2:.*]] = and i32 %[[T2]], 65535
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%load2 = load i32, i32* %addr, align 4
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%cmp = icmp ne i64 %idx, 0
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br i1 %cmp, label %loop, label %end
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end:
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ret void
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}
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