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131 lines
3.8 KiB
131 lines
3.8 KiB
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __LIMA_DRM_H__
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#define __LIMA_DRM_H__
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#include "drm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum drm_lima_param_gpu_id {
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DRM_LIMA_PARAM_GPU_ID_UNKNOWN,
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DRM_LIMA_PARAM_GPU_ID_MALI400,
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DRM_LIMA_PARAM_GPU_ID_MALI450,
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};
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enum drm_lima_param {
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DRM_LIMA_PARAM_GPU_ID,
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DRM_LIMA_PARAM_NUM_PP,
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DRM_LIMA_PARAM_GP_VERSION,
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DRM_LIMA_PARAM_PP_VERSION,
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};
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struct drm_lima_get_param {
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__u32 param;
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__u32 pad;
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__u64 value;
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};
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#define LIMA_BO_FLAG_HEAP (1 << 0)
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struct drm_lima_gem_create {
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__u32 size;
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__u32 flags;
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__u32 handle;
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__u32 pad;
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};
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struct drm_lima_gem_info {
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__u32 handle;
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__u32 va;
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__u64 offset;
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};
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#define LIMA_SUBMIT_BO_READ 0x01
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#define LIMA_SUBMIT_BO_WRITE 0x02
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struct drm_lima_gem_submit_bo {
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__u32 handle;
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__u32 flags;
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};
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#define LIMA_GP_FRAME_REG_NUM 6
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struct drm_lima_gp_frame {
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__u32 frame[LIMA_GP_FRAME_REG_NUM];
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};
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#define LIMA_PP_FRAME_REG_NUM 23
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#define LIMA_PP_WB_REG_NUM 12
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struct drm_lima_m400_pp_frame {
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__u32 frame[LIMA_PP_FRAME_REG_NUM];
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__u32 num_pp;
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__u32 wb[3 * LIMA_PP_WB_REG_NUM];
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__u32 plbu_array_address[4];
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__u32 fragment_stack_address[4];
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};
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struct drm_lima_m450_pp_frame {
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__u32 frame[LIMA_PP_FRAME_REG_NUM];
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__u32 num_pp;
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__u32 wb[3 * LIMA_PP_WB_REG_NUM];
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__u32 use_dlbu;
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__u32 _pad;
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union {
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__u32 plbu_array_address[8];
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__u32 dlbu_regs[4];
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};
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__u32 fragment_stack_address[8];
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};
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#define LIMA_PIPE_GP 0x00
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#define LIMA_PIPE_PP 0x01
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#define LIMA_SUBMIT_FLAG_EXPLICIT_FENCE (1 << 0)
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struct drm_lima_gem_submit {
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__u32 ctx;
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__u32 pipe;
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__u32 nr_bos;
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__u32 frame_size;
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__u64 bos;
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__u64 frame;
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__u32 flags;
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__u32 out_sync;
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__u32 in_sync[2];
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};
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#define LIMA_GEM_WAIT_READ 0x01
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#define LIMA_GEM_WAIT_WRITE 0x02
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struct drm_lima_gem_wait {
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__u32 handle;
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__u32 op;
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__s64 timeout_ns;
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};
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struct drm_lima_ctx_create {
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__u32 id;
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__u32 _pad;
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};
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struct drm_lima_ctx_free {
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__u32 id;
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__u32 _pad;
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};
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#define DRM_LIMA_GET_PARAM 0x00
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#define DRM_LIMA_GEM_CREATE 0x01
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#define DRM_LIMA_GEM_INFO 0x02
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#define DRM_LIMA_GEM_SUBMIT 0x03
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#define DRM_LIMA_GEM_WAIT 0x04
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#define DRM_LIMA_CTX_CREATE 0x05
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#define DRM_LIMA_CTX_FREE 0x06
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#define DRM_IOCTL_LIMA_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GET_PARAM, struct drm_lima_get_param)
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#define DRM_IOCTL_LIMA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GEM_CREATE, struct drm_lima_gem_create)
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#define DRM_IOCTL_LIMA_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_LIMA_GEM_INFO, struct drm_lima_gem_info)
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#define DRM_IOCTL_LIMA_GEM_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_GEM_SUBMIT, struct drm_lima_gem_submit)
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#define DRM_IOCTL_LIMA_GEM_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_GEM_WAIT, struct drm_lima_gem_wait)
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#define DRM_IOCTL_LIMA_CTX_CREATE DRM_IOR(DRM_COMMAND_BASE + DRM_LIMA_CTX_CREATE, struct drm_lima_ctx_create)
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#define DRM_IOCTL_LIMA_CTX_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_LIMA_CTX_FREE, struct drm_lima_ctx_free)
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#ifdef __cplusplus
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}
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#endif
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#endif
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