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119 lines
3.5 KiB
119 lines
3.5 KiB
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef _V3D_DRM_H_
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#define _V3D_DRM_H_
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#include "drm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define DRM_V3D_SUBMIT_CL 0x00
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#define DRM_V3D_WAIT_BO 0x01
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#define DRM_V3D_CREATE_BO 0x02
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#define DRM_V3D_MMAP_BO 0x03
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#define DRM_V3D_GET_PARAM 0x04
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#define DRM_V3D_GET_BO_OFFSET 0x05
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#define DRM_V3D_SUBMIT_TFU 0x06
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#define DRM_V3D_SUBMIT_CSD 0x07
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#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
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#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
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#define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
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#define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)
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#define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
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#define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
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#define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu)
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#define DRM_IOCTL_V3D_SUBMIT_CSD DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd)
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#define DRM_V3D_SUBMIT_CL_FLUSH_CACHE 0x01
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struct drm_v3d_submit_cl {
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__u32 bcl_start;
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__u32 bcl_end;
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__u32 rcl_start;
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__u32 rcl_end;
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__u32 in_sync_bcl;
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__u32 in_sync_rcl;
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__u32 out_sync;
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__u32 qma;
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__u32 qms;
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__u32 qts;
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__u64 bo_handles;
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__u32 bo_handle_count;
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__u32 flags;
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};
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struct drm_v3d_wait_bo {
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__u32 handle;
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__u32 pad;
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__u64 timeout_ns;
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};
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struct drm_v3d_create_bo {
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__u32 size;
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__u32 flags;
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__u32 handle;
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__u32 offset;
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};
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struct drm_v3d_mmap_bo {
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__u32 handle;
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__u32 flags;
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__u64 offset;
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};
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enum drm_v3d_param {
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DRM_V3D_PARAM_V3D_UIFCFG,
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DRM_V3D_PARAM_V3D_HUB_IDENT1,
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DRM_V3D_PARAM_V3D_HUB_IDENT2,
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DRM_V3D_PARAM_V3D_HUB_IDENT3,
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DRM_V3D_PARAM_V3D_CORE0_IDENT0,
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DRM_V3D_PARAM_V3D_CORE0_IDENT1,
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DRM_V3D_PARAM_V3D_CORE0_IDENT2,
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DRM_V3D_PARAM_SUPPORTS_TFU,
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DRM_V3D_PARAM_SUPPORTS_CSD,
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DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH,
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};
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struct drm_v3d_get_param {
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__u32 param;
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__u32 pad;
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__u64 value;
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};
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struct drm_v3d_get_bo_offset {
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__u32 handle;
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__u32 offset;
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};
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struct drm_v3d_submit_tfu {
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__u32 icfg;
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__u32 iia;
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__u32 iis;
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__u32 ica;
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__u32 iua;
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__u32 ioa;
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__u32 ios;
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__u32 coef[4];
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__u32 bo_handles[4];
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__u32 in_sync;
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__u32 out_sync;
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};
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struct drm_v3d_submit_csd {
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__u32 cfg[7];
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__u32 coef[4];
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__u64 bo_handles;
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__u32 bo_handle_count;
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__u32 in_sync;
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__u32 out_sync;
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};
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#ifdef __cplusplus
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}
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#endif
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#endif
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