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271 lines
9.8 KiB
271 lines
9.8 KiB
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __GENWQE_CARD_H__
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#define __GENWQE_CARD_H__
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#include <linux/types.h>
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#include <linux/ioctl.h>
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#define GENWQE_DEVNAME "genwqe"
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#define GENWQE_TYPE_ALTERA_230 0x00
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#define GENWQE_TYPE_ALTERA_530 0x01
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#define GENWQE_TYPE_ALTERA_A4 0x02
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#define GENWQE_TYPE_ALTERA_A7 0x03
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#define GENWQE_UID_OFFS(uid) ((uid) << 24)
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#define GENWQE_SLU_OFFS GENWQE_UID_OFFS(0)
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#define GENWQE_HSU_OFFS GENWQE_UID_OFFS(1)
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#define GENWQE_APP_OFFS GENWQE_UID_OFFS(2)
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#define GENWQE_MAX_UNITS 3
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#define IO_EXTENDED_ERROR_POINTER 0x00000048
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#define IO_ERROR_INJECT_SELECTOR 0x00000060
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#define IO_EXTENDED_DIAG_SELECTOR 0x00000070
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#define IO_EXTENDED_DIAG_READ_MBX 0x00000078
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#define IO_EXTENDED_DIAG_MAP(ring) (0x00000500 | ((ring) << 3))
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#define GENWQE_EXTENDED_DIAG_SELECTOR(ring,trace) (((ring) << 8) | (trace))
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#define IO_SLU_UNITCFG 0x00000000
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#define IO_SLU_UNITCFG_TYPE_MASK 0x000000000ff00000
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#define IO_SLU_FIR 0x00000008
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#define IO_SLU_FIR_CLR 0x00000010
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#define IO_SLU_FEC 0x00000018
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#define IO_SLU_ERR_ACT_MASK 0x00000020
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#define IO_SLU_ERR_ATTN_MASK 0x00000028
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#define IO_SLU_FIRX1_ACT_MASK 0x00000030
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#define IO_SLU_FIRX0_ACT_MASK 0x00000038
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#define IO_SLU_SEC_LEM_DEBUG_OVR 0x00000040
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#define IO_SLU_EXTENDED_ERR_PTR 0x00000048
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#define IO_SLU_COMMON_CONFIG 0x00000060
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#define IO_SLU_FLASH_FIR 0x00000108
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#define IO_SLU_SLC_FIR 0x00000110
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#define IO_SLU_RIU_TRAP 0x00000280
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#define IO_SLU_FLASH_FEC 0x00000308
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#define IO_SLU_SLC_FEC 0x00000310
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#define IO_SLC_QUEUE_SEGMENT 0x00010000
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#define IO_SLC_VF_QUEUE_SEGMENT 0x00050000
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#define IO_SLC_QUEUE_OFFSET 0x00010008
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#define IO_SLC_VF_QUEUE_OFFSET 0x00050008
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#define IO_SLC_QUEUE_CONFIG 0x00010010
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#define IO_SLC_VF_QUEUE_CONFIG 0x00050010
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#define IO_SLC_APPJOB_TIMEOUT 0x00010018
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#define IO_SLC_VF_APPJOB_TIMEOUT 0x00050018
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#define TIMEOUT_250MS 0x0000000f
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#define HEARTBEAT_DISABLE 0x0000ff00
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#define IO_SLC_QUEUE_INITSQN 0x00010020
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#define IO_SLC_VF_QUEUE_INITSQN 0x00050020
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#define IO_SLC_QUEUE_WRAP 0x00010028
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#define IO_SLC_VF_QUEUE_WRAP 0x00050028
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#define IO_SLC_QUEUE_STATUS 0x00010100
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#define IO_SLC_VF_QUEUE_STATUS 0x00050100
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#define IO_SLC_QUEUE_WTIME 0x00010030
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#define IO_SLC_VF_QUEUE_WTIME 0x00050030
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#define IO_SLC_QUEUE_ERRCNTS 0x00010038
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#define IO_SLC_VF_QUEUE_ERRCNTS 0x00050038
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#define IO_SLC_QUEUE_LRW 0x00010040
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#define IO_SLC_VF_QUEUE_LRW 0x00050040
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#define IO_SLC_FREE_RUNNING_TIMER 0x00010108
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#define IO_SLC_VF_FREE_RUNNING_TIMER 0x00050108
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#define IO_PF_SLC_VIRTUAL_REGION 0x00050000
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#define IO_PF_SLC_VIRTUAL_WINDOW 0x00060000
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#define IO_PF_SLC_JOBPEND(n) (0x00061000 + 8 * (n))
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#define IO_SLC_JOBPEND(n) IO_PF_SLC_JOBPEND(n)
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#define IO_SLU_SLC_PARSE_TRAP(n) (0x00011000 + 8 * (n))
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#define IO_SLU_SLC_DISP_TRAP(n) (0x00011200 + 8 * (n))
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#define IO_SLC_CFGREG_GFIR 0x00020000
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#define GFIR_ERR_TRIGGER 0x0000ffff
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#define IO_SLC_CFGREG_SOFTRESET 0x00020018
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#define IO_SLC_MISC_DEBUG 0x00020060
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#define IO_SLC_MISC_DEBUG_CLR 0x00020068
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#define IO_SLC_MISC_DEBUG_SET 0x00020070
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#define IO_SLU_TEMPERATURE_SENSOR 0x00030000
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#define IO_SLU_TEMPERATURE_CONFIG 0x00030008
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#define IO_SLU_VOLTAGE_CONTROL 0x00030080
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#define IO_SLU_VOLTAGE_NOMINAL 0x00000000
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#define IO_SLU_VOLTAGE_DOWN5 0x00000006
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#define IO_SLU_VOLTAGE_UP5 0x00000007
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#define IO_SLU_LEDCONTROL 0x00030100
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#define IO_SLU_FLASH_DIRECTACCESS 0x00040010
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#define IO_SLU_FLASH_DIRECTACCESS2 0x00040020
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#define IO_SLU_FLASH_CMDINTF 0x00040030
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#define IO_SLU_BITSTREAM 0x00040040
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#define IO_HSU_ERR_BEHAVIOR 0x01001010
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#define IO_SLC2_SQB_TRAP 0x00062000
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#define IO_SLC2_QUEUE_MANAGER_TRAP 0x00062008
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#define IO_SLC2_FLS_MASTER_TRAP 0x00062010
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#define IO_HSU_UNITCFG 0x01000000
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#define IO_HSU_FIR 0x01000008
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#define IO_HSU_FIR_CLR 0x01000010
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#define IO_HSU_FEC 0x01000018
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#define IO_HSU_ERR_ACT_MASK 0x01000020
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#define IO_HSU_ERR_ATTN_MASK 0x01000028
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#define IO_HSU_FIRX1_ACT_MASK 0x01000030
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#define IO_HSU_FIRX0_ACT_MASK 0x01000038
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#define IO_HSU_SEC_LEM_DEBUG_OVR 0x01000040
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#define IO_HSU_EXTENDED_ERR_PTR 0x01000048
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#define IO_HSU_COMMON_CONFIG 0x01000060
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#define IO_APP_UNITCFG 0x02000000
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#define IO_APP_FIR 0x02000008
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#define IO_APP_FIR_CLR 0x02000010
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#define IO_APP_FEC 0x02000018
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#define IO_APP_ERR_ACT_MASK 0x02000020
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#define IO_APP_ERR_ATTN_MASK 0x02000028
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#define IO_APP_FIRX1_ACT_MASK 0x02000030
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#define IO_APP_FIRX0_ACT_MASK 0x02000038
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#define IO_APP_SEC_LEM_DEBUG_OVR 0x02000040
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#define IO_APP_EXTENDED_ERR_PTR 0x02000048
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#define IO_APP_COMMON_CONFIG 0x02000060
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#define IO_APP_DEBUG_REG_01 0x02010000
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#define IO_APP_DEBUG_REG_02 0x02010008
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#define IO_APP_DEBUG_REG_03 0x02010010
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#define IO_APP_DEBUG_REG_04 0x02010018
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#define IO_APP_DEBUG_REG_05 0x02010020
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#define IO_APP_DEBUG_REG_06 0x02010028
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#define IO_APP_DEBUG_REG_07 0x02010030
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#define IO_APP_DEBUG_REG_08 0x02010038
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#define IO_APP_DEBUG_REG_09 0x02010040
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#define IO_APP_DEBUG_REG_10 0x02010048
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#define IO_APP_DEBUG_REG_11 0x02010050
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#define IO_APP_DEBUG_REG_12 0x02010058
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#define IO_APP_DEBUG_REG_13 0x02010060
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#define IO_APP_DEBUG_REG_14 0x02010068
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#define IO_APP_DEBUG_REG_15 0x02010070
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#define IO_APP_DEBUG_REG_16 0x02010078
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#define IO_APP_DEBUG_REG_17 0x02010080
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#define IO_APP_DEBUG_REG_18 0x02010088
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struct genwqe_reg_io {
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__u64 num;
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__u64 val64;
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};
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#define IO_ILLEGAL_VALUE 0xffffffffffffffffull
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#define DDCB_ACFUNC_SLU 0x00
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#define DDCB_ACFUNC_APP 0x01
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#define DDCB_RETC_IDLE 0x0000
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#define DDCB_RETC_PENDING 0x0101
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#define DDCB_RETC_COMPLETE 0x0102
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#define DDCB_RETC_FAULT 0x0104
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#define DDCB_RETC_ERROR 0x0108
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#define DDCB_RETC_FORCED_ERROR 0x01ff
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#define DDCB_RETC_UNEXEC 0x0110
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#define DDCB_RETC_TERM 0x0120
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#define DDCB_RETC_RES0 0x0140
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#define DDCB_RETC_RES1 0x0180
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#define DDCB_OPT_ECHO_FORCE_NO 0x0000
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#define DDCB_OPT_ECHO_FORCE_102 0x0001
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#define DDCB_OPT_ECHO_FORCE_104 0x0002
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#define DDCB_OPT_ECHO_FORCE_108 0x0003
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#define DDCB_OPT_ECHO_FORCE_110 0x0004
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#define DDCB_OPT_ECHO_FORCE_120 0x0005
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#define DDCB_OPT_ECHO_FORCE_140 0x0006
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#define DDCB_OPT_ECHO_FORCE_180 0x0007
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#define DDCB_OPT_ECHO_COPY_NONE (0 << 5)
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#define DDCB_OPT_ECHO_COPY_ALL (1 << 5)
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#define SLCMD_ECHO_SYNC 0x00
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#define SLCMD_MOVE_FLASH 0x06
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#define SLCMD_MOVE_FLASH_FLAGS_MODE 0x03
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#define SLCMD_MOVE_FLASH_FLAGS_DLOAD 0
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#define SLCMD_MOVE_FLASH_FLAGS_EMUL 1
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#define SLCMD_MOVE_FLASH_FLAGS_UPLOAD 2
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#define SLCMD_MOVE_FLASH_FLAGS_VERIFY 3
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#define SLCMD_MOVE_FLASH_FLAG_NOTAP (1 << 2)
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#define SLCMD_MOVE_FLASH_FLAG_POLL (1 << 3)
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#define SLCMD_MOVE_FLASH_FLAG_PARTITION (1 << 4)
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#define SLCMD_MOVE_FLASH_FLAG_ERASE (1 << 5)
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enum genwqe_card_state {
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GENWQE_CARD_UNUSED = 0,
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GENWQE_CARD_USED = 1,
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GENWQE_CARD_FATAL_ERROR = 2,
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GENWQE_CARD_RELOAD_BITSTREAM = 3,
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GENWQE_CARD_STATE_MAX,
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};
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struct genwqe_bitstream {
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__u64 data_addr;
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__u32 size;
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__u32 crc;
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__u64 target_addr;
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__u32 partition;
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__u32 uid;
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__u64 slu_id;
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__u64 app_id;
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__u16 retc;
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__u16 attn;
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__u32 progress;
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};
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#define DDCB_LENGTH 256
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#define DDCB_ASIV_LENGTH 104
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#define DDCB_ASIV_LENGTH_ATS 96
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#define DDCB_ASV_LENGTH 64
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#define DDCB_FIXUPS 12
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struct genwqe_debug_data {
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char driver_version[64];
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__u64 slu_unitcfg;
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__u64 app_unitcfg;
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__u8 ddcb_before[DDCB_LENGTH];
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__u8 ddcb_prev[DDCB_LENGTH];
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__u8 ddcb_finished[DDCB_LENGTH];
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};
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#define ATS_TYPE_DATA 0x0ull
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#define ATS_TYPE_FLAT_RD 0x4ull
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#define ATS_TYPE_FLAT_RDWR 0x5ull
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#define ATS_TYPE_SGL_RD 0x6ull
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#define ATS_TYPE_SGL_RDWR 0x7ull
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#define ATS_SET_FLAGS(_struct,_field,_flags) (((_flags) & 0xf) << (44 - (4 * (offsetof(_struct, _field) / 8))))
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#define ATS_GET_FLAGS(_ats,_byte_offs) (((_ats) >> (44 - (4 * ((_byte_offs) / 8)))) & 0xf)
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struct genwqe_ddcb_cmd {
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__u64 next_addr;
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__u64 flags;
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__u8 acfunc;
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__u8 cmd;
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__u8 asiv_length;
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__u8 asv_length;
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__u16 cmdopts;
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__u16 retc;
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__u16 attn;
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__u16 vcrc;
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__u32 progress;
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__u64 deque_ts;
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__u64 cmplt_ts;
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__u64 disp_ts;
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__u64 ddata_addr;
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__u8 asv[DDCB_ASV_LENGTH];
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union {
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struct {
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__u64 ats;
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__u8 asiv[DDCB_ASIV_LENGTH_ATS];
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};
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__u8 __asiv[DDCB_ASIV_LENGTH];
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};
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};
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#define GENWQE_IOC_CODE 0xa5
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#define GENWQE_READ_REG64 _IOR(GENWQE_IOC_CODE, 30, struct genwqe_reg_io)
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#define GENWQE_WRITE_REG64 _IOW(GENWQE_IOC_CODE, 31, struct genwqe_reg_io)
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#define GENWQE_READ_REG32 _IOR(GENWQE_IOC_CODE, 32, struct genwqe_reg_io)
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#define GENWQE_WRITE_REG32 _IOW(GENWQE_IOC_CODE, 33, struct genwqe_reg_io)
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#define GENWQE_READ_REG16 _IOR(GENWQE_IOC_CODE, 34, struct genwqe_reg_io)
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#define GENWQE_WRITE_REG16 _IOW(GENWQE_IOC_CODE, 35, struct genwqe_reg_io)
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#define GENWQE_GET_CARD_STATE _IOR(GENWQE_IOC_CODE, 36, enum genwqe_card_state)
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struct genwqe_mem {
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__u64 addr;
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__u64 size;
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__u64 direction;
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__u64 flags;
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};
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#define GENWQE_PIN_MEM _IOWR(GENWQE_IOC_CODE, 40, struct genwqe_mem)
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#define GENWQE_UNPIN_MEM _IOWR(GENWQE_IOC_CODE, 41, struct genwqe_mem)
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#define GENWQE_EXECUTE_DDCB _IOWR(GENWQE_IOC_CODE, 50, struct genwqe_ddcb_cmd)
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#define GENWQE_EXECUTE_RAW_DDCB _IOWR(GENWQE_IOC_CODE, 51, struct genwqe_ddcb_cmd)
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#define GENWQE_SLU_UPDATE _IOWR(GENWQE_IOC_CODE, 80, struct genwqe_bitstream)
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#define GENWQE_SLU_READ _IOWR(GENWQE_IOC_CODE, 81, struct genwqe_bitstream)
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#endif
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