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102 lines
4.1 KiB
102 lines
4.1 KiB
/*
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* Copyright (C) 2020 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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// Define assembler macros for generating DWARF CFI instructions that use DWARF expressions.
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// Assemblers don't natively support DWARF expressions, so use the C preprocessor and assembler
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// macros to lower them to .cfi_escape directives.
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//
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// Signal trampolines need to use DWARF expressions to record the locations of saved registers,
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// because the offsets from the restored SP to the saved registers is variable. e.g. A signal frame
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// can have optional FP/SIMD extensions, and there may be extra padding if the interrupted SP wasn't
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// aligned.
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// DWARF constants.
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#define DW_CFA_def_cfa_expression 0x0f
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#define DW_CFA_expression 0x10
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#define DW_OP_breg0 0x70
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#define DW_OP_deref 0x06
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// Return the size of a small uleb128 value: either 1 or 2 bytes
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#define ULEB128_14BIT_SIZE(val) \
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(1 + (((val) > 0x7f) & 1))
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// Return the size of a small sleb128 value: either 1 or 2 bytes
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#define SLEB128_14BIT_SIZE(val) \
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(1 + (((val) < -0x40) & 1) + \
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(((val) > 0x3f) & 1) )
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// Output a 1 or 2-byte CFI uleb128 absolute value.
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.macro m_cfi_uleb128 val
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.if (\val) < 0 || (\val) > 0x3fff
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.error "m_cfi_uleb128 value is out of range (\val)"
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.elseif (\val) > 0x7f
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.cfi_escape ((\val) & 0x7f) | 0x80
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.cfi_escape (\val) >> 7
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.else
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.cfi_escape (\val)
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.endif
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.endm
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// Output a 1 or 2-byte CFI sleb128 absolute value.
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.macro m_cfi_sleb128 val
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.if (\val) < -0x2000 || (\val) > 0x1fff
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.error "m_cfi_sleb128 value is out of range (\val)"
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.elseif (\val) < -0x40 || (\val) > 0x3f
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.cfi_escape ((\val) & 0x7f) | 0x80
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.cfi_escape ((\val) >> 7) & 0x7f
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.else
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.cfi_escape (\val) & 0x7f
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.endif
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.endm
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.macro check_base_reg reg_no
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.if (\reg_no) < 0 || (\reg_no) > 31
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.error "base register is out of range for DW_OP_breg0..DW_OP_breg31 (\reg_no)"
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.endif
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.endm
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// Set CFA to the expression, *(base_reg + offset)
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.macro m_cfi_def_cfa_deref base_reg, offset
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check_base_reg (\base_reg)
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.cfi_escape DW_CFA_def_cfa_expression
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m_cfi_uleb128 (1 + SLEB128_14BIT_SIZE(\offset) + 1) // size of DWARF expression in bytes
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.cfi_escape DW_OP_breg0 + (\base_reg) // expr: 1 byte
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m_cfi_sleb128 (\offset) // expr: 1 or 2 bytes
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.cfi_escape DW_OP_deref // expr: 1 byte
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.endm
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// Set the address of the register's previous value to the expression, (base_reg + offset)
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.macro m_cfi_breg_offset dest_reg, base_reg, offset
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check_base_reg (\base_reg)
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.cfi_escape DW_CFA_expression
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m_cfi_uleb128 (\dest_reg)
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m_cfi_uleb128 (1 + SLEB128_14BIT_SIZE(\offset)) // size of DWARF expression in bytes
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.cfi_escape DW_OP_breg0 + (\base_reg) // expr: 1 byte
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m_cfi_sleb128 (\offset) // expr: 1 or 2 bytes
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.endm
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