You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
168 lines
3.9 KiB
168 lines
3.9 KiB
# RUN: not llvm-mc -triple armv8 -show-encoding -disassemble %s 2>&1 | FileCheck %s
|
|
|
|
# Coprocessors other than CP10, CP11, CP14 and CP15 are undefined in ARMv8;
|
|
# but in ARMv7, all these instructions are valid
|
|
|
|
# RUN: llvm-mc -triple armv7 -show-encoding -disassemble %s | FileCheck %s --check-prefix=CHECK-V7
|
|
|
|
[0x00 0x01 0x00 0xee]
|
|
# CHECK-V7: cdp
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x00 0xee]
|
|
|
|
[0x00 0x0e 0x00 0xee]
|
|
# CHECK-V7: cdp
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0e 0x00 0xee]
|
|
|
|
[0x00 0x0f 0x00 0xee]
|
|
# CHECK-V7: cdp
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0f 0x00 0xee]
|
|
|
|
[0x00 0x01 0x00 0xfe]
|
|
# CHECK-V7: cdp2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x00 0xfe]
|
|
|
|
[0x00 0x0e 0x00 0xfe]
|
|
# CHECK-V7: cdp2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0e 0x00 0xfe]
|
|
|
|
[0x00 0x0f 0x00 0xfe]
|
|
# CHECK-V7: cdp2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0f 0x00 0xfe]
|
|
|
|
[0x10 0x01 0x00 0xee]
|
|
# CHECK-V7: mcr
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x10 0x01 0x00 0xee]
|
|
|
|
[0x10 0x01 0x00 0xfe]
|
|
# CHECK-V7: mcr2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x10 0x01 0x00 0xfe]
|
|
|
|
[0x10 0x0e 0x00 0xfe]
|
|
# CHECK-V7: mcr2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x10 0x0e 0x00 0xfe]
|
|
|
|
[0x10 0x0f 0x00 0xfe]
|
|
# CHECK-V7: mcr2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x10 0x0f 0x00 0xfe]
|
|
|
|
[0x10 0x01 0x10 0xee]
|
|
# CHECK-V7: mrc
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x10 0x01 0x10 0xee]
|
|
|
|
[0x10 0x01 0x10 0xfe]
|
|
# CHECK-V7: mrc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x10 0x01 0x10 0xfe]
|
|
|
|
[0x10 0x0e 0x10 0xfe]
|
|
# CHECK-V7: mrc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x10 0x0e 0x10 0xfe]
|
|
|
|
[0x10 0x0f 0x10 0xfe]
|
|
# CHECK-V7: mrc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x10 0x0f 0x10 0xfe]
|
|
|
|
[0x00 0x01 0x40 0xec]
|
|
# CHECK-V7: mcrr
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x40 0xec]
|
|
|
|
[0x00 0x01 0x40 0xfc]
|
|
# CHECK-V7: mcrr2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x40 0xfc]
|
|
|
|
[0x00 0x0e 0x40 0xfc]
|
|
# CHECK-V7: mcrr2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0e 0x40 0xfc]
|
|
|
|
[0x00 0x0f 0x40 0xfc]
|
|
# CHECK-V7: mcrr2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0f 0x40 0xfc]
|
|
|
|
[0x00 0x01 0x50 0xec]
|
|
# CHECK-V7: mrrc
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x50 0xec]
|
|
|
|
[0x00 0x0e 0x50 0xfc]
|
|
# CHECK-V7: mrrc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0e 0x50 0xfc]
|
|
|
|
[0x00 0x0f 0x50 0xfc]
|
|
# CHECK-V7: mrrc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0f 0x50 0xfc]
|
|
|
|
[0x00 0x01 0x50 0xfc]
|
|
# CHECK-V7: mrrc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x50 0xfc]
|
|
|
|
[0x00 0x01 0x80 0xec]
|
|
# CHECK-V7: stc
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x80 0xec]
|
|
|
|
[0x00 0x0f 0x80 0xec]
|
|
# CHECK-V7: stc
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0f 0x80 0xec]
|
|
|
|
[0x00 0x01 0x80 0xfc]
|
|
# CHECK-V7: stc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x80 0xfc]
|
|
|
|
[0x00 0x0e 0x80 0xfc]
|
|
# CHECK-V7: stc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0e 0x80 0xfc]
|
|
|
|
[0x00 0x0f 0x80 0xfc]
|
|
# CHECK-V7: stc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0f 0x80 0xfc]
|
|
|
|
[0x00 0x01 0x90 0xec]
|
|
# CHECK-V7: ldc
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x90 0xec]
|
|
|
|
[0x00 0x0f 0x90 0xec]
|
|
# CHECK-V7: ldc
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0f 0x90 0xec]
|
|
|
|
[0x00 0x01 0x90 0xfc]
|
|
# CHECK-V7: ldc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x01 0x90 0xfc]
|
|
|
|
[0x00 0x0e 0x90 0xfc]
|
|
# CHECK-V7: ldc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0e 0x90 0xfc]
|
|
|
|
[0x00 0x0f 0x90 0xfc]
|
|
# CHECK-V7: ldc2
|
|
# CHECK: invalid instruction encoding
|
|
# CHECK-NEXT: [0x00 0x0f 0x90 0xfc]
|
|
|