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################################################################################
# Copyright (c) Hisilicon Technologies Co., Ltd. 2014-2020. All rights reserved.
# Description: mmu cache code
# Author: SmartMedia_BSP
# Create: 2014-06-04
################################################################################
SRCS-y += libc/
SRCS-y += secure_c/source/
SRCS-$(CONFIG_UART) += console.c
SRCS-y += malloc.c memlib.c malloc_res.c div64.c
SRCS-y += modules.c
SRCS-$(CONFIG_GENERIC_SFC) += bits.c