You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
101 lines
2.4 KiB
101 lines
2.4 KiB
/*
|
|
* Copyright (c) Hisilicon Technologies Co., Ltd. 2012-2019. All rights reserved.
|
|
* Description: decoder
|
|
* Author: Hisilicon
|
|
* Create: 2012-04-22
|
|
*/
|
|
|
|
#ifndef __DMCU_MEM_H__
|
|
#define __DMCU_MEM_H__
|
|
|
|
#include "td_type.h"
|
|
#include "soc_osal.h"
|
|
#include "dmcu_common.h"
|
|
#include "drv_dmcu_sys.h"
|
|
|
|
#define dmcu_align_up(val, align) (((val) + (align)-1) & (~((align)-1)))
|
|
#define dmcu_align_dn(val, align) ((val) & (~((align)-1)))
|
|
|
|
/* dmcu iommu mem manage cfg */
|
|
#define DMCU_ADDR_LEN_NS_SCALE 100 /* 1~100 % */
|
|
#define DMCU_ADDR_LEN_NC_SCALE 90 /* 1~100 % */
|
|
#define DMCU_SCALE_NUM 100
|
|
|
|
/* dmcu test value */
|
|
#define DMCU_DEFAULT_WRITE_VALUE (0x5a5a)
|
|
#define SIZE_8K (0x2000)
|
|
#define SIZE_48M (48 * 1024 * 1024)
|
|
#define ARGS_NUM 1
|
|
|
|
#define DMCU_MEM_NAME_MAX_LEN 128
|
|
|
|
typedef struct dmcu_test_cmd_function_ {
|
|
int cmd;
|
|
td_void (*handler)(td_s32 argc, const char **argv);
|
|
} dmcu_test_cmd_function;
|
|
|
|
typedef enum {
|
|
DMCU_IOMMU_NOSEC_NOCACHE = 0b000,
|
|
DMCU_IOMMU_NOSEC_CACHE = 0b001,
|
|
DMCU_IOMMU_SEC_NOCACHE = 0b010,
|
|
DMCU_IOMMU_SEC_CACHE = 0b011,
|
|
DMCU_IOMMU_TYPE_MAX = 4,
|
|
DMCU_MMZ_NOSEC_NOCACHE = 0b100,
|
|
DMCU_MMZ_NOSEC_CACHE = 0b101,
|
|
DMCU_MMZ_SEC_NOCACHE = 0b110,
|
|
DMCU_MMZ_SEC_CACHE = 0b111,
|
|
DMCU_VAM_TYPE_MAX,
|
|
} dmcu_mem_type;
|
|
|
|
typedef struct {
|
|
td_u64 dma_buf;
|
|
td_char mem_name[DMCU_MEM_NAME_MAX_LEN];
|
|
td_u64 phy_addr;
|
|
td_u32 length;
|
|
dmcu_mem_type type;
|
|
} dmcu_mem_record;
|
|
|
|
typedef struct {
|
|
td_u32 flag;
|
|
td_u64 pt_sec_addr;
|
|
td_u64 pt_nosec_addr;
|
|
td_u64 pt_mmz_addr;
|
|
td_u64 pt_mmz_size;
|
|
} dmcu_mem_init_data;
|
|
|
|
typedef struct {
|
|
td_s32 is_sec;
|
|
td_u32 base_addr;
|
|
td_u32 err_read_addr;
|
|
td_u32 err_write_addr;
|
|
} mem_page_table;
|
|
|
|
typedef enum {
|
|
MEM_PT_NS = 0,
|
|
MEM_PT_S,
|
|
MEM_PT_MAX
|
|
} dmcu_mem_pt_index;
|
|
|
|
typedef struct {
|
|
td_u32 base_addr;
|
|
td_u32 mmz_size;
|
|
} arm_mmz_info;
|
|
|
|
typedef struct {
|
|
UADDR iommu_base_vir_addr;
|
|
td_u32 iommu_total_size;
|
|
td_u32 page_size;
|
|
td_u32 page_align;
|
|
td_u32 mmu_inited;
|
|
arm_mmz_info mmz_info;
|
|
mem_page_table dmcu_pt[MEM_PT_MAX];
|
|
mem_page_table arm_pt[MEM_PT_MAX];
|
|
} dmcu_mem_ctx;
|
|
|
|
td_s32 dmcu_mem_init(td_void);
|
|
td_void dmcu_mem_resume(td_void);
|
|
td_s32 dmcu_pool_mem_init(UADDR phy_addr, td_u32 size, dmcu_mem_type type, UADDR *vir_addr);
|
|
void *dmcu_pool_mem_malloc(td_u32 size);
|
|
td_s32 dmcu_pool_mem_free(td_void *addr);
|
|
td_s32 dmcu_pool_mem_deinit(UADDR vir_addr, td_u32 size);
|
|
#endif |