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163 lines
3.6 KiB
163 lines
3.6 KiB
/*
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* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stddef.h>
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#include <lib/mmio.h>
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#include "emmc_config.h"
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#include "emmc_hal.h"
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#include "emmc_std.h"
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#include "emmc_registers.h"
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#include "emmc_def.h"
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#include "rcar_private.h"
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st_mmc_base mmc_drv_obj;
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EMMC_ERROR_CODE rcar_emmc_memcard_power(uint8_t mode)
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{
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if (mode == TRUE) {
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/* power on (Vcc&Vccq is always power on) */
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mmc_drv_obj.card_power_enable = TRUE;
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} else {
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/* power off (Vcc&Vccq is always power on) */
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mmc_drv_obj.card_power_enable = FALSE;
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mmc_drv_obj.mount = FALSE;
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mmc_drv_obj.selected = FALSE;
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}
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return EMMC_SUCCESS;
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}
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static inline void emmc_set_retry_count(uint32_t retry)
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{
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mmc_drv_obj.retries_after_fail = retry;
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}
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static inline void emmc_set_data_timeout(uint32_t data_timeout)
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{
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mmc_drv_obj.data_timeout = data_timeout;
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}
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static void emmc_memset(uint8_t *buff, uint8_t data, uint32_t cnt)
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{
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if (buff == NULL) {
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return;
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}
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while (cnt > 0) {
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*buff++ = data;
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cnt--;
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}
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}
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static void emmc_driver_config(void)
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{
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emmc_set_retry_count(EMMC_RETRY_COUNT);
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emmc_set_data_timeout(EMMC_RW_DATA_TIMEOUT);
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}
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static void emmc_drv_init(void)
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{
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emmc_memset((uint8_t *) (&mmc_drv_obj), 0, sizeof(st_mmc_base));
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mmc_drv_obj.card_present = HAL_MEMCARD_CARD_IS_IN;
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mmc_drv_obj.data_timeout = EMMC_RW_DATA_TIMEOUT;
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mmc_drv_obj.bus_width = HAL_MEMCARD_DATA_WIDTH_1_BIT;
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}
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static EMMC_ERROR_CODE emmc_dev_finalize(void)
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{
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EMMC_ERROR_CODE result;
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uint32_t dataL;
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/*
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* MMC power off
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* the power supply of eMMC device is always turning on.
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* RST_n : Hi --> Low level.
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*/
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result = rcar_emmc_memcard_power(FALSE);
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/* host controller reset */
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SETR_32(SD_INFO1, 0x00000000U); /* all interrupt clear */
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SETR_32(SD_INFO2, SD_INFO2_CLEAR); /* all interrupt clear */
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SETR_32(SD_INFO1_MASK, 0x00000000U); /* all interrupt disable */
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SETR_32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* all interrupt disable */
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SETR_32(SD_CLK_CTRL, 0x00000000U); /* MMC clock stop */
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dataL = mmio_read_32(CPG_SMSTPCR3);
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if ((dataL & CPG_MSTP_MMC) == 0U) {
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dataL |= (CPG_MSTP_MMC);
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mmio_write_32(CPG_CPGWPR, (~dataL));
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mmio_write_32(CPG_SMSTPCR3, dataL);
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}
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return result;
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}
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static EMMC_ERROR_CODE emmc_dev_init(void)
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{
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/* Enable clock supply to eMMC. */
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mstpcr_write(CPG_SMSTPCR3, CPG_MSTPSR3, CPG_MSTP_MMC);
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/* Set SD clock */
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mmio_write_32(CPG_CPGWPR, ~((uint32_t) (BIT9 | BIT0))); /* SD phy 200MHz */
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/* Stop SDnH clock & SDn=200MHz */
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mmio_write_32(CPG_SDxCKCR, (BIT9 | BIT0));
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/* MMCIF initialize */
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SETR_32(SD_INFO1, 0x00000000U); /* all interrupt clear */
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SETR_32(SD_INFO2, SD_INFO2_CLEAR); /* all interrupt clear */
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SETR_32(SD_INFO1_MASK, 0x00000000U); /* all interrupt disable */
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SETR_32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* all interrupt disable */
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SETR_32(HOST_MODE, 0x00000000U); /* SD_BUF access width = 64-bit */
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SETR_32(SD_OPTION, 0x0000C0EEU); /* Bus width = 1bit, timeout=MAX */
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SETR_32(SD_CLK_CTRL, 0x00000000U); /* Disable Automatic Control & Clock Output */
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return EMMC_SUCCESS;
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}
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static EMMC_ERROR_CODE emmc_reset_controller(void)
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{
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EMMC_ERROR_CODE result;
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/* initialize mmc driver */
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emmc_drv_init();
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/* initialize H/W */
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result = emmc_dev_init();
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if (result == EMMC_SUCCESS) {
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mmc_drv_obj.initialize = TRUE;
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}
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return result;
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}
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EMMC_ERROR_CODE emmc_terminate(void)
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{
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EMMC_ERROR_CODE result;
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result = emmc_dev_finalize();
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emmc_memset((uint8_t *) (&mmc_drv_obj), 0, sizeof(st_mmc_base));
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return result;
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}
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EMMC_ERROR_CODE rcar_emmc_init(void)
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{
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EMMC_ERROR_CODE result;
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result = emmc_reset_controller();
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if (result == EMMC_SUCCESS) {
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emmc_driver_config();
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}
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return result;
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}
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