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239 lines
6.5 KiB
239 lines
6.5 KiB
/* Copyright (c) 2002 Intel Corporation */
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#include <stdio.h>
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#include "internal.h"
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#define D102_REV_ID 12
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#define MDI_MDIX_CONFIG_IS_OK 0x0010
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#define MDI_MDIX_STATUS 0x0020
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#define SOFT_INT 0x0200 /* Generate a S/W interrupt */
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/* Interrupt masks */
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#define ALL_INT_MASK 0x0100 /* Mask interrupts */
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#define FCP_INT_MASK 0x0400 /* Flow Control Pause */
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#define ER_INT_MASK 0x0800 /* Early Receive */
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#define RNR_INT_MASK 0x1000 /* RU Not Ready */
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#define CNA_INT_MASK 0x2000 /* CU Not Active */
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#define FR_INT_MASK 0x4000 /* Frame Received */
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#define CX_INT_MASK 0x8000 /* CU eXecution w/ I-bit done */
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/* Interrupts pending */
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#define FCP_INT_PENDING 0x0100 /* Flow Control Pause */
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#define ER_INT_PENDING 0x0200 /* Early Receive */
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#define SWI_INT_PENDING 0x0400 /* S/W generated interrupt */
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#define MDI_INT_PENDING 0x0800 /* MDI read or write done */
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#define RNR_INT_PENDING 0x1000 /* RU Became Not Ready */
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#define CNA_INT_PENDING 0x2000 /* CU Became Inactive (IDLE) */
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#define FR_INT_PENDING 0x4000 /* RU Received A Frame */
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#define CX_INT_PENDING 0x8000 /* CU Completed Action Cmd */
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/* Status */
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#define CU_STATUS 0x00C0
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#define RU_STATUS 0x003C
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/* Commands */
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#define CU_CMD 0x00F0
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#define RU_CMD 0x0007
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int e100_dump_regs(struct ethtool_drvinfo *info maybe_unused,
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struct ethtool_regs *regs)
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{
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u32 *regs_buff = (u32 *)regs->data;
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u8 version = (u8)(regs->version >> 24);
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u8 rev_id = (u8)(regs->version);
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u8 regs_len = regs->len / sizeof(u32);
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u32 reg;
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u16 scb_status, scb_cmd;
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if (version != 1)
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return -1;
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reg = regs_buff[0];
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scb_status = reg & 0x0000ffff;
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scb_cmd = reg >> 16;
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fprintf(stdout,
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"SCB Status Word (Lower Word) 0x%04X\n",
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scb_status);
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switch ((scb_status & RU_STATUS) >> 2) {
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case 0:
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fprintf(stdout,
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" RU Status: Idle\n");
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break;
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case 1:
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fprintf(stdout,
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" RU Status: Suspended\n");
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break;
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case 2:
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fprintf(stdout,
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" RU Status: No Resources\n");
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break;
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case 4:
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fprintf(stdout,
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" RU Status: Ready\n");
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break;
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case 9:
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fprintf(stdout,
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" RU Status: Suspended with no more RBDs\n");
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break;
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case 10:
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fprintf(stdout,
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" RU Status: No Resources due to no more RBDs\n");
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break;
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case 12:
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fprintf(stdout,
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" RU Status: Ready with no RBDs present\n");
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break;
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default:
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fprintf(stdout,
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" RU Status: Unknown State\n");
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break;
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}
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switch ((scb_status & CU_STATUS) >> 6) {
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case 0:
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fprintf(stdout,
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" CU Status: Idle\n");
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break;
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case 1:
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fprintf(stdout,
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" CU Status: Suspended\n");
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break;
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case 2:
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fprintf(stdout,
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" CU Status: Active\n");
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break;
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default:
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fprintf(stdout,
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" CU Status: Unknown State\n");
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break;
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}
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fprintf(stdout,
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" ---- Interrupts Pending ----\n"
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" Flow Control Pause: %s\n"
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" Early Receive: %s\n"
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" Software Generated Interrupt: %s\n"
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" MDI Done: %s\n"
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" RU Not In Ready State: %s\n"
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" CU Not in Active State: %s\n"
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" RU Received Frame: %s\n"
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" CU Completed Command: %s\n",
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scb_status & FCP_INT_PENDING ? "yes" : "no",
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scb_status & ER_INT_PENDING ? "yes" : "no",
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scb_status & SWI_INT_PENDING ? "yes" : "no",
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scb_status & MDI_INT_PENDING ? "yes" : "no",
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scb_status & RNR_INT_PENDING ? "yes" : "no",
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scb_status & CNA_INT_PENDING ? "yes" : "no",
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scb_status & FR_INT_PENDING ? "yes" : "no",
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scb_status & CX_INT_PENDING ? "yes" : "no");
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fprintf(stdout,
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"SCB Command Word (Upper Word) 0x%04X\n",
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scb_cmd);
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switch (scb_cmd & RU_CMD) {
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case 0:
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fprintf(stdout,
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" RU Command: No Command\n");
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break;
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case 1:
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fprintf(stdout,
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" RU Command: RU Start\n");
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break;
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case 2:
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fprintf(stdout,
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" RU Command: RU Resume\n");
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break;
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case 4:
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fprintf(stdout,
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" RU Command: RU Abort\n");
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break;
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case 6:
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fprintf(stdout,
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" RU Command: Load RU Base\n");
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break;
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default:
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fprintf(stdout,
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" RU Command: Unknown\n");
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break;
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}
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switch ((scb_cmd & CU_CMD) >> 4) {
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case 0:
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fprintf(stdout,
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" CU Command: No Command\n");
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break;
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case 1:
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fprintf(stdout,
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" CU Command: CU Start\n");
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break;
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case 2:
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fprintf(stdout,
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" CU Command: CU Resume\n");
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break;
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case 4:
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fprintf(stdout,
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" CU Command: Load Dump Counters Address\n");
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break;
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case 5:
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fprintf(stdout,
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" CU Command: Dump Counters\n");
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break;
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case 6:
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fprintf(stdout,
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" CU Command: Load CU Base\n");
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break;
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case 7:
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fprintf(stdout,
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" CU Command: Dump & Reset Counters\n");
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break;
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default:
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fprintf(stdout,
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" CU Command: Unknown\n");
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break;
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}
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fprintf(stdout,
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" Software Generated Interrupt: %s\n",
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scb_cmd & SOFT_INT ? "yes" : "no");
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fprintf(stdout,
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" ---- Interrupts Masked ----\n"
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" ALL Interrupts: %s\n"
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" Flow Control Pause: %s\n"
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" Early Receive: %s\n"
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" RU Not In Ready State: %s\n"
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" CU Not in Active State: %s\n"
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" RU Received Frame: %s\n"
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" CU Completed Command: %s\n",
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scb_cmd & ALL_INT_MASK ? "yes" : "no",
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scb_cmd & FCP_INT_MASK ? "yes" : "no",
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scb_cmd & ER_INT_MASK ? "yes" : "no",
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scb_cmd & RNR_INT_MASK ? "yes" : "no",
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scb_cmd & CNA_INT_MASK ? "yes" : "no",
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scb_cmd & FR_INT_MASK ? "yes" : "no",
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scb_cmd & CX_INT_MASK ? "yes" : "no");
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if(regs_len > 1) {
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fprintf(stdout, "MDI/MDI-X Status: ");
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if(rev_id < D102_REV_ID)
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fprintf(stdout, "MDI\n");
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else {
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u16 ctrl_reg = regs_buff[1];
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if(ctrl_reg & MDI_MDIX_CONFIG_IS_OK) {
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if(ctrl_reg & MDI_MDIX_STATUS)
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fprintf(stdout, "MDI-X\n");
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else
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fprintf(stdout, "MDI\n");
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} else
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fprintf(stdout, "Unknown\n");
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}
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}
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return 0;
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}
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