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136 lines
4.7 KiB
136 lines
4.7 KiB
/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
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/*
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* Copyright (C) 2011 Texas Instruments, Inc
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <rob@ti.com>
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*/
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#ifndef __OMAP_DRM_H__
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#define __OMAP_DRM_H__
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#include <stdint.h>
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#include <drm.h>
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/* Please note that modifications to all structs defined here are
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* subject to backwards-compatibility constraints.
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*/
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#define OMAP_PARAM_CHIPSET_ID 1 /* ie. 0x3430, 0x4430, etc */
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struct drm_omap_param {
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uint64_t param; /* in */
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uint64_t value; /* in (set_param), out (get_param) */
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};
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struct drm_omap_get_base {
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char plugin_name[64]; /* in */
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uint32_t ioctl_base; /* out */
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uint32_t __pad;
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};
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#define OMAP_BO_SCANOUT 0x00000001 /* scanout capable (phys contiguous) */
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#define OMAP_BO_CACHE_MASK 0x00000006 /* cache type mask, see cache modes */
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#define OMAP_BO_TILED_MASK 0x00000f00 /* tiled mapping mask, see tiled modes */
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/* cache modes */
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#define OMAP_BO_CACHED 0x00000000 /* default */
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#define OMAP_BO_WC 0x00000002 /* write-combine */
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#define OMAP_BO_UNCACHED 0x00000004 /* strongly-ordered (uncached) */
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/* tiled modes */
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#define OMAP_BO_TILED_8 0x00000100
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#define OMAP_BO_TILED_16 0x00000200
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#define OMAP_BO_TILED_32 0x00000300
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#define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)
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union omap_gem_size {
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uint32_t bytes; /* (for non-tiled formats) */
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struct {
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uint16_t width;
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uint16_t height;
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} tiled; /* (for tiled formats) */
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};
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struct drm_omap_gem_new {
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union omap_gem_size size; /* in */
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uint32_t flags; /* in */
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uint32_t handle; /* out */
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uint32_t __pad;
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};
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/* mask of operations: */
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enum omap_gem_op {
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OMAP_GEM_READ = 0x01,
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OMAP_GEM_WRITE = 0x02,
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};
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struct drm_omap_gem_cpu_prep {
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uint32_t handle; /* buffer handle (in) */
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uint32_t op; /* mask of omap_gem_op (in) */
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};
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struct drm_omap_gem_cpu_fini {
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uint32_t handle; /* buffer handle (in) */
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uint32_t op; /* mask of omap_gem_op (in) */
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/* TODO maybe here we pass down info about what regions are touched
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* by sw so we can be clever about cache ops? For now a placeholder,
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* set to zero and we just do full buffer flush..
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*/
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uint32_t nregions;
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uint32_t __pad;
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};
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struct drm_omap_gem_info {
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uint32_t handle; /* buffer handle (in) */
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uint32_t pad;
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uint64_t offset; /* mmap offset (out) */
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/* note: in case of tiled buffers, the user virtual size can be
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* different from the physical size (ie. how many pages are needed
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* to back the object) which is returned in DRM_IOCTL_GEM_OPEN..
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* This size here is the one that should be used if you want to
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* mmap() the buffer:
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*/
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uint32_t size; /* virtual size for mmap'ing (out) */
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uint32_t __pad;
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};
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#define DRM_OMAP_GET_PARAM 0x00
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#define DRM_OMAP_SET_PARAM 0x01
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#define DRM_OMAP_GET_BASE 0x02
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#define DRM_OMAP_GEM_NEW 0x03
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#define DRM_OMAP_GEM_CPU_PREP 0x04
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#define DRM_OMAP_GEM_CPU_FINI 0x05
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#define DRM_OMAP_GEM_INFO 0x06
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#define DRM_OMAP_NUM_IOCTLS 0x07
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#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
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#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
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#define DRM_IOCTL_OMAP_GET_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_BASE, struct drm_omap_get_base)
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#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
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#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
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#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
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#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
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#endif /* __OMAP_DRM_H__ */
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