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318 lines
7.8 KiB
318 lines
7.8 KiB
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <stdio.h>
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#include "CUnit/Basic.h"
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#include "amdgpu_test.h"
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#include "amdgpu_drm.h"
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#include "amdgpu_internal.h"
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#define BUFFER_SIZE (4*1024)
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#define BUFFER_ALIGN (4*1024)
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static amdgpu_device_handle device_handle;
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static uint32_t major_version;
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static uint32_t minor_version;
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static amdgpu_bo_handle buffer_handle;
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static uint64_t virtual_mc_base_address;
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static amdgpu_va_handle va_handle;
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static void amdgpu_bo_export_import(void);
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static void amdgpu_bo_metadata(void);
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static void amdgpu_bo_map_unmap(void);
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static void amdgpu_memory_alloc(void);
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static void amdgpu_mem_fail_alloc(void);
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static void amdgpu_bo_find_by_cpu_mapping(void);
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CU_TestInfo bo_tests[] = {
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{ "Export/Import", amdgpu_bo_export_import },
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{ "Metadata", amdgpu_bo_metadata },
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{ "CPU map/unmap", amdgpu_bo_map_unmap },
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{ "Memory alloc Test", amdgpu_memory_alloc },
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{ "Memory fail alloc Test", amdgpu_mem_fail_alloc },
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{ "Find bo by CPU mapping", amdgpu_bo_find_by_cpu_mapping },
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CU_TEST_INFO_NULL,
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};
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int suite_bo_tests_init(void)
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{
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struct amdgpu_bo_alloc_request req = {0};
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amdgpu_bo_handle buf_handle;
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uint64_t va;
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int r;
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r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
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&minor_version, &device_handle);
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if (r) {
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if ((r == -EACCES) && (errno == EACCES))
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printf("\n\nError:%s. "
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"Hint:Try to run this test program as root.",
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strerror(errno));
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return CUE_SINIT_FAILED;
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}
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req.alloc_size = BUFFER_SIZE;
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req.phys_alignment = BUFFER_ALIGN;
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req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
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r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
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if (r)
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return CUE_SINIT_FAILED;
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r = amdgpu_va_range_alloc(device_handle,
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amdgpu_gpu_va_range_general,
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BUFFER_SIZE, BUFFER_ALIGN, 0,
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&va, &va_handle, 0);
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if (r)
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goto error_va_alloc;
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r = amdgpu_bo_va_op(buf_handle, 0, BUFFER_SIZE, va, 0, AMDGPU_VA_OP_MAP);
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if (r)
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goto error_va_map;
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buffer_handle = buf_handle;
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virtual_mc_base_address = va;
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return CUE_SUCCESS;
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error_va_map:
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amdgpu_va_range_free(va_handle);
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error_va_alloc:
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amdgpu_bo_free(buf_handle);
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return CUE_SINIT_FAILED;
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}
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int suite_bo_tests_clean(void)
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{
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int r;
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r = amdgpu_bo_va_op(buffer_handle, 0, BUFFER_SIZE,
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virtual_mc_base_address, 0,
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AMDGPU_VA_OP_UNMAP);
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if (r)
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return CUE_SCLEAN_FAILED;
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r = amdgpu_va_range_free(va_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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r = amdgpu_bo_free(buffer_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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r = amdgpu_device_deinitialize(device_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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return CUE_SUCCESS;
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}
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static void amdgpu_bo_export_import_do_type(enum amdgpu_bo_handle_type type)
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{
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struct amdgpu_bo_import_result res = {0};
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uint32_t shared_handle;
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int r;
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r = amdgpu_bo_export(buffer_handle, type, &shared_handle);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_import(device_handle, type, shared_handle, &res);
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CU_ASSERT_EQUAL(r, 0);
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CU_ASSERT_EQUAL(res.buf_handle, buffer_handle);
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CU_ASSERT_EQUAL(res.alloc_size, BUFFER_SIZE);
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r = amdgpu_bo_free(res.buf_handle);
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CU_ASSERT_EQUAL(r, 0);
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}
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static void amdgpu_bo_export_import(void)
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{
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if (open_render_node) {
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printf("(DRM render node is used. Skip export/Import test) ");
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return;
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}
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amdgpu_bo_export_import_do_type(amdgpu_bo_handle_type_gem_flink_name);
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amdgpu_bo_export_import_do_type(amdgpu_bo_handle_type_dma_buf_fd);
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}
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static void amdgpu_bo_metadata(void)
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{
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struct amdgpu_bo_metadata meta = {0};
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struct amdgpu_bo_info info = {0};
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int r;
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meta.size_metadata = 1;
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meta.umd_metadata[0] = 0xdeadbeef;
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r = amdgpu_bo_set_metadata(buffer_handle, &meta);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_query_info(buffer_handle, &info);
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CU_ASSERT_EQUAL(r, 0);
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CU_ASSERT_EQUAL(info.metadata.size_metadata, 1);
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CU_ASSERT_EQUAL(info.metadata.umd_metadata[0], 0xdeadbeef);
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}
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static void amdgpu_bo_map_unmap(void)
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{
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uint32_t *ptr;
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int i, r;
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r = amdgpu_bo_cpu_map(buffer_handle, (void **)&ptr);
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CU_ASSERT_EQUAL(r, 0);
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CU_ASSERT_NOT_EQUAL(ptr, NULL);
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for (i = 0; i < (BUFFER_SIZE / 4); ++i)
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ptr[i] = 0xdeadbeef;
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r = amdgpu_bo_cpu_unmap(buffer_handle);
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CU_ASSERT_EQUAL(r, 0);
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}
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static void amdgpu_memory_alloc(void)
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{
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amdgpu_bo_handle bo;
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amdgpu_va_handle va_handle;
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uint64_t bo_mc;
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int r;
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/* Test visible VRAM */
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bo = gpu_mem_alloc(device_handle,
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4096, 4096,
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
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&bo_mc, &va_handle);
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r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
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CU_ASSERT_EQUAL(r, 0);
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/* Test invisible VRAM */
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bo = gpu_mem_alloc(device_handle,
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4096, 4096,
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
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&bo_mc, &va_handle);
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r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
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CU_ASSERT_EQUAL(r, 0);
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/* Test GART Cacheable */
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bo = gpu_mem_alloc(device_handle,
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4096, 4096,
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AMDGPU_GEM_DOMAIN_GTT,
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0, &bo_mc, &va_handle);
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r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
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CU_ASSERT_EQUAL(r, 0);
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/* Test GART USWC */
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bo = gpu_mem_alloc(device_handle,
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4096, 4096,
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AMDGPU_GEM_DOMAIN_GTT,
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AMDGPU_GEM_CREATE_CPU_GTT_USWC,
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&bo_mc, &va_handle);
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r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
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CU_ASSERT_EQUAL(r, 0);
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/* Test GDS */
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bo = gpu_mem_alloc(device_handle, 1024, 0,
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AMDGPU_GEM_DOMAIN_GDS, 0,
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NULL, NULL);
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r = gpu_mem_free(bo, NULL, 0, 4096);
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CU_ASSERT_EQUAL(r, 0);
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/* Test GWS */
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bo = gpu_mem_alloc(device_handle, 1, 0,
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AMDGPU_GEM_DOMAIN_GWS, 0,
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NULL, NULL);
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r = gpu_mem_free(bo, NULL, 0, 4096);
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CU_ASSERT_EQUAL(r, 0);
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/* Test OA */
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bo = gpu_mem_alloc(device_handle, 1, 0,
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AMDGPU_GEM_DOMAIN_OA, 0,
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NULL, NULL);
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r = gpu_mem_free(bo, NULL, 0, 4096);
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CU_ASSERT_EQUAL(r, 0);
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}
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static void amdgpu_mem_fail_alloc(void)
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{
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int r;
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struct amdgpu_bo_alloc_request req = {0};
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amdgpu_bo_handle buf_handle;
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/* Test impossible mem allocation, 1TB */
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req.alloc_size = 0xE8D4A51000;
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req.phys_alignment = 4096;
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req.preferred_heap = AMDGPU_GEM_DOMAIN_VRAM;
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req.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
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r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
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CU_ASSERT_EQUAL(r, -ENOMEM);
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if (!r) {
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r = amdgpu_bo_free(buf_handle);
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CU_ASSERT_EQUAL(r, 0);
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}
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}
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static void amdgpu_bo_find_by_cpu_mapping(void)
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{
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amdgpu_bo_handle bo_handle, find_bo_handle;
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amdgpu_va_handle va_handle;
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void *bo_cpu;
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uint64_t bo_mc_address;
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uint64_t offset;
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int r;
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r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
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AMDGPU_GEM_DOMAIN_GTT, 0,
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&bo_handle, &bo_cpu,
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&bo_mc_address, &va_handle);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_find_bo_by_cpu_mapping(device_handle,
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bo_cpu,
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4096,
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&find_bo_handle,
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&offset);
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CU_ASSERT_EQUAL(r, 0);
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CU_ASSERT_EQUAL(offset, 0);
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CU_ASSERT_EQUAL(bo_handle->handle, find_bo_handle->handle);
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atomic_dec(&find_bo_handle->refcount, 1);
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r = amdgpu_bo_unmap_and_free(bo_handle, va_handle,
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bo_mc_address, 4096);
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CU_ASSERT_EQUAL(r, 0);
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}
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