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170 lines
8.3 KiB
170 lines
8.3 KiB
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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declare void @use(<4 x i16>)
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define void @test(<16 x i8> %w, i32* %o1, float* %o2) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: [[V_BC:%.*]] = bitcast <16 x i8> [[W:%.*]] to <4 x i32>
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; CHECK-NEXT: [[V_EXTRACT:%.*]] = extractelement <4 x i32> [[V_BC]], i32 3
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; CHECK-NEXT: [[V_BC1:%.*]] = bitcast <16 x i8> [[W]] to <4 x float>
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; CHECK-NEXT: [[V_EXTRACT2:%.*]] = extractelement <4 x float> [[V_BC1]], i32 3
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; CHECK-NEXT: store i32 [[V_EXTRACT]], i32* [[O1:%.*]], align 4
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; CHECK-NEXT: store float [[V_EXTRACT2]], float* [[O2:%.*]], align 4
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; CHECK-NEXT: ret void
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;
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%v = shufflevector <16 x i8> %w, <16 x i8> undef, <4 x i32> <i32 12, i32 13, i32 14, i32 15>
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%f = bitcast <4 x i8> %v to float
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%i = bitcast <4 x i8> %v to i32
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store i32 %i, i32* %o1, align 4
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store float %f, float* %o2, align 4
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ret void
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}
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; Shuffle-of-bitcast-splat --> splat-bitcast
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define <4 x i16> @splat_bitcast_operand(<8 x i8> %x) {
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; CHECK-LABEL: @splat_bitcast_operand(
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; CHECK-NEXT: [[S1:%.*]] = shufflevector <8 x i8> [[X:%.*]], <8 x i8> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: [[S2:%.*]] = bitcast <8 x i8> [[S1]] to <4 x i16>
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; CHECK-NEXT: ret <4 x i16> [[S2]]
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;
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%s1 = shufflevector <8 x i8> %x, <8 x i8> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%bc = bitcast <8 x i8> %s1 to <4 x i16>
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%s2 = shufflevector <4 x i16> %bc, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 1, i32 0>
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ret <4 x i16> %s2
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}
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; Shuffle-of-bitcast-splat --> splat-bitcast
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define <4 x i16> @splat_bitcast_operand_uses(<8 x i8> %x) {
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; CHECK-LABEL: @splat_bitcast_operand_uses(
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; CHECK-NEXT: [[S1:%.*]] = shufflevector <8 x i8> [[X:%.*]], <8 x i8> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: [[BC:%.*]] = bitcast <8 x i8> [[S1]] to <4 x i16>
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; CHECK-NEXT: call void @use(<4 x i16> [[BC]])
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; CHECK-NEXT: [[S2:%.*]] = bitcast <8 x i8> [[S1]] to <4 x i16>
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; CHECK-NEXT: ret <4 x i16> [[S2]]
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;
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%s1 = shufflevector <8 x i8> %x, <8 x i8> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%bc = bitcast <8 x i8> %s1 to <4 x i16>
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call void @use(<4 x i16> %bc)
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%s2 = shufflevector <4 x i16> %bc, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 1, i32 0>
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ret <4 x i16> %s2
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}
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; Shuffle-of-bitcast-splat --> splat-bitcast
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define <4 x i32> @splat_bitcast_operand_same_size_src_elt(<4 x float> %x) {
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; CHECK-LABEL: @splat_bitcast_operand_same_size_src_elt(
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; CHECK-NEXT: [[S1:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: [[S2:%.*]] = bitcast <4 x float> [[S1]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[S2]]
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;
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%s1 = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
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%bc = bitcast <4 x float> %s1 to <4 x i32>
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%s2 = shufflevector <4 x i32> %bc, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 1, i32 0>
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ret <4 x i32> %s2
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}
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; Scaled mask is inverse of first mask.
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define <4 x i32> @shuf_bitcast_operand(<16 x i8> %x) {
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; CHECK-LABEL: @shuf_bitcast_operand(
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; CHECK-NEXT: [[S2:%.*]] = bitcast <16 x i8> [[X:%.*]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[S2]]
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;
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%s1 = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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%bc = bitcast <16 x i8> %s1 to <4 x i32>
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%s2 = shufflevector <4 x i32> %bc, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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ret <4 x i32> %s2
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}
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; TODO: Could allow fold for length-changing shuffles.
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define <5 x i16> @splat_bitcast_operand_change_type(<8 x i8> %x) {
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; CHECK-LABEL: @splat_bitcast_operand_change_type(
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; CHECK-NEXT: [[S1:%.*]] = shufflevector <8 x i8> [[X:%.*]], <8 x i8> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: [[BC:%.*]] = bitcast <8 x i8> [[S1]] to <4 x i16>
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; CHECK-NEXT: [[S2:%.*]] = shufflevector <4 x i16> [[BC]], <4 x i16> undef, <5 x i32> <i32 0, i32 2, i32 1, i32 0, i32 3>
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; CHECK-NEXT: ret <5 x i16> [[S2]]
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;
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%s1 = shufflevector <8 x i8> %x, <8 x i8> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%bc = bitcast <8 x i8> %s1 to <4 x i16>
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%s2 = shufflevector <4 x i16> %bc, <4 x i16> undef, <5 x i32> <i32 0, i32 2, i32 1, i32 0, i32 3>
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ret <5 x i16> %s2
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}
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; Shuffle-of-bitcast-splat --> splat-bitcast
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define <4 x i16> @splat_bitcast_operand_wider_src_elt(<2 x i32> %x) {
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; CHECK-LABEL: @splat_bitcast_operand_wider_src_elt(
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; CHECK-NEXT: [[S1:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
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; CHECK-NEXT: [[S2:%.*]] = bitcast <2 x i32> [[S1]] to <4 x i16>
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; CHECK-NEXT: ret <4 x i16> [[S2]]
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;
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%s1 = shufflevector <2 x i32> %x, <2 x i32> undef, <2 x i32> <i32 1, i32 1>
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%bc = bitcast <2 x i32> %s1 to <4 x i16>
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%s2 = shufflevector <4 x i16> %bc, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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ret <4 x i16> %s2
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}
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; Shuffle-of-bitcast-splat --> splat-bitcast
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define <4 x i16> @splat_bitcast_operand_wider_src_elt_uses(<2 x i32> %x) {
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; CHECK-LABEL: @splat_bitcast_operand_wider_src_elt_uses(
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; CHECK-NEXT: [[S1:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
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; CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i32> [[S1]] to <4 x i16>
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; CHECK-NEXT: call void @use(<4 x i16> [[BC]])
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; CHECK-NEXT: [[S2:%.*]] = bitcast <2 x i32> [[S1]] to <4 x i16>
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; CHECK-NEXT: ret <4 x i16> [[S2]]
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;
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%s1 = shufflevector <2 x i32> %x, <2 x i32> undef, <2 x i32> <i32 1, i32 1>
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%bc = bitcast <2 x i32> %s1 to <4 x i16>
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call void @use(<4 x i16> %bc)
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%s2 = shufflevector <4 x i16> %bc, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
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ret <4 x i16> %s2
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}
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; Scaled mask is inverse of first mask.
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define <16 x i8> @shuf_bitcast_operand_wider_src(<4 x i32> %x) {
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; CHECK-LABEL: @shuf_bitcast_operand_wider_src(
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; CHECK-NEXT: [[S2:%.*]] = bitcast <4 x i32> [[X:%.*]] to <16 x i8>
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; CHECK-NEXT: ret <16 x i8> [[S2]]
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;
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%s1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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%bc = bitcast <4 x i32> %s1 to <16 x i8>
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%s2 = shufflevector <16 x i8> %bc, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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ret <16 x i8> %s2
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}
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; Negative test - the 2nd mask can't be widened
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define <16 x i8> @shuf_bitcast_operand_cannot_widen(<4 x i32> %x) {
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; CHECK-LABEL: @shuf_bitcast_operand_cannot_widen(
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; CHECK-NEXT: [[S1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[S1]] to <16 x i8>
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; CHECK-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[BC]], <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 12, i32 13, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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; CHECK-NEXT: ret <16 x i8> [[S2]]
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;
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%s1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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%bc = bitcast <4 x i32> %s1 to <16 x i8>
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%s2 = shufflevector <16 x i8> %bc, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 12, i32 13, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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ret <16 x i8> %s2
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}
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; Negative test - the 2nd mask can't be widened
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define <16 x i8> @shuf_bitcast_operand_cannot_widen_undef(<4 x i32> %x) {
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; CHECK-LABEL: @shuf_bitcast_operand_cannot_widen_undef(
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; CHECK-NEXT: [[S1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[S1]] to <16 x i8>
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; CHECK-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[BC]], <16 x i8> undef, <16 x i32> <i32 12, i32 undef, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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; CHECK-NEXT: ret <16 x i8> [[S2]]
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;
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%s1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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%bc = bitcast <4 x i32> %s1 to <16 x i8>
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%s2 = shufflevector <16 x i8> %bc, <16 x i8> undef, <16 x i32> <i32 12, i32 undef, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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ret <16 x i8> %s2
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}
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