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244 lines
8.6 KiB
244 lines
8.6 KiB
//===- LLVMIntrinsicGen.cpp - TableGen utility for converting intrinsics --===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This is a TableGen generator that converts TableGen definitions for LLVM
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// intrinsics to TableGen definitions for MLIR operations.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/TableGen/GenInfo.h"
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#include "llvm/ADT/SmallBitVector.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/MachineValueType.h"
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#include "llvm/Support/PrettyStackTrace.h"
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#include "llvm/Support/Signals.h"
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#include "llvm/TableGen/Error.h"
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#include "llvm/TableGen/Main.h"
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#include "llvm/TableGen/Record.h"
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#include "llvm/TableGen/TableGenBackend.h"
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static llvm::cl::OptionCategory IntrinsicGenCat("Intrinsics Generator Options");
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static llvm::cl::opt<std::string>
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nameFilter("llvmir-intrinsics-filter",
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llvm::cl::desc("Only keep the intrinsics with the specified "
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"substring in their record name"),
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llvm::cl::cat(IntrinsicGenCat));
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static llvm::cl::opt<std::string>
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opBaseClass("dialect-opclass-base",
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llvm::cl::desc("The base class for the ops in the dialect we "
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"are planning to emit"),
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llvm::cl::init("LLVM_IntrOp"), llvm::cl::cat(IntrinsicGenCat));
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// Used to represent the indices of overloadable operands/results.
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using IndicesTy = llvm::SmallBitVector;
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/// Return a CodeGen value type entry from a type record.
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static llvm::MVT::SimpleValueType getValueType(const llvm::Record *rec) {
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return (llvm::MVT::SimpleValueType)rec->getValueAsDef("VT")->getValueAsInt(
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"Value");
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}
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/// Return the indices of the definitions in a list of definitions that
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/// represent overloadable types
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static IndicesTy getOverloadableTypeIdxs(const llvm::Record &record,
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const char *listName) {
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auto results = record.getValueAsListOfDefs(listName);
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IndicesTy overloadedOps(results.size());
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for (auto r : llvm::enumerate(results)) {
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llvm::MVT::SimpleValueType vt = getValueType(r.value());
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switch (vt) {
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case llvm::MVT::iAny:
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case llvm::MVT::fAny:
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case llvm::MVT::Any:
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case llvm::MVT::iPTRAny:
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case llvm::MVT::vAny:
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overloadedOps.set(r.index());
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break;
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default:
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continue;
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}
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}
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return overloadedOps;
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}
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namespace {
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/// A wrapper for LLVM's Tablegen class `Intrinsic` that provides accessors to
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/// the fields of the record.
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class LLVMIntrinsic {
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public:
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LLVMIntrinsic(const llvm::Record &record) : record(record) {}
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/// Get the name of the operation to be used in MLIR. Uses the appropriate
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/// field if not empty, constructs a name by replacing underscores with dots
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/// in the record name otherwise.
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std::string getOperationName() const {
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llvm::StringRef name = record.getValueAsString(fieldName);
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if (!name.empty())
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return name.str();
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name = record.getName();
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assert(name.startswith("int_") &&
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"LLVM intrinsic names are expected to start with 'int_'");
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name = name.drop_front(4);
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llvm::SmallVector<llvm::StringRef, 8> chunks;
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llvm::StringRef targetPrefix = record.getValueAsString("TargetPrefix");
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name.split(chunks, '_');
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auto chunksBegin = chunks.begin();
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// Remove the target prefix from target specific intrinsics.
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if (!targetPrefix.empty()) {
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assert(targetPrefix == *chunksBegin &&
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"Intrinsic has TargetPrefix, but "
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"record name doesn't begin with it");
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assert(chunks.size() >= 2 &&
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"Intrinsic has TargetPrefix, but "
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"chunks has only one element meaning the intrinsic name is empty");
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++chunksBegin;
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}
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return llvm::join(chunksBegin, chunks.end(), ".");
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}
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/// Get the name of the record without the "intrinsic" prefix.
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llvm::StringRef getProperRecordName() const {
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llvm::StringRef name = record.getName();
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assert(name.startswith("int_") &&
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"LLVM intrinsic names are expected to start with 'int_'");
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return name.drop_front(4);
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}
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/// Get the number of operands.
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unsigned getNumOperands() const {
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auto operands = record.getValueAsListOfDefs(fieldOperands);
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assert(llvm::all_of(operands,
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[](const llvm::Record *r) {
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return r->isSubClassOf("LLVMType");
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}) &&
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"expected operands to be of LLVM type");
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return operands.size();
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}
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/// Get the number of results. Note that LLVM does not support multi-value
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/// operations so, in fact, multiple results will be returned as a value of
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/// structure type.
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unsigned getNumResults() const {
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auto results = record.getValueAsListOfDefs(fieldResults);
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for (const llvm::Record *r : results) {
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(void)r;
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assert(r->isSubClassOf("LLVMType") &&
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"expected operands to be of LLVM type");
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}
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return results.size();
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}
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/// Return true if the intrinsic may have side effects, i.e. does not have the
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/// `IntrNoMem` property.
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bool hasSideEffects() const {
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auto props = record.getValueAsListOfDefs(fieldTraits);
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for (const llvm::Record *r : props) {
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if (r->getName() == "IntrNoMem")
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return true;
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}
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return false;
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}
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/// Return true if the intrinsic is commutative, i.e. has the respective
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/// property.
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bool isCommutative() const {
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auto props = record.getValueAsListOfDefs(fieldTraits);
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for (const llvm::Record *r : props) {
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if (r->getName() == "Commutative")
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return true;
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}
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return false;
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}
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IndicesTy getOverloadableOperandsIdxs() const {
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return getOverloadableTypeIdxs(record, fieldOperands);
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}
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IndicesTy getOverloadableResultsIdxs() const {
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return getOverloadableTypeIdxs(record, fieldResults);
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}
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private:
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/// Names of the fields in the Intrinsic LLVM Tablegen class.
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const char *fieldName = "LLVMName";
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const char *fieldOperands = "ParamTypes";
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const char *fieldResults = "RetTypes";
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const char *fieldTraits = "IntrProperties";
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const llvm::Record &record;
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};
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} // namespace
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/// Prints the elements in "range" separated by commas and surrounded by "[]".
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template <typename Range>
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void printBracketedRange(const Range &range, llvm::raw_ostream &os) {
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os << '[';
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llvm::interleaveComma(range, os);
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os << ']';
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}
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/// Emits ODS (TableGen-based) code for `record` representing an LLVM intrinsic.
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/// Returns true on error, false on success.
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static bool emitIntrinsic(const llvm::Record &record, llvm::raw_ostream &os) {
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LLVMIntrinsic intr(record);
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// Prepare strings for traits, if any.
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llvm::SmallVector<llvm::StringRef, 2> traits;
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if (intr.isCommutative())
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traits.push_back("Commutative");
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if (!intr.hasSideEffects())
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traits.push_back("NoSideEffect");
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// Prepare strings for operands.
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llvm::SmallVector<llvm::StringRef, 8> operands(intr.getNumOperands(),
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"LLVM_Type");
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// Emit the definition.
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os << "def LLVM_" << intr.getProperRecordName() << " : " << opBaseClass
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<< "<\"" << intr.getOperationName() << "\", ";
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printBracketedRange(intr.getOverloadableResultsIdxs().set_bits(), os);
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os << ", ";
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printBracketedRange(intr.getOverloadableOperandsIdxs().set_bits(), os);
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os << ", ";
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printBracketedRange(traits, os);
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os << ", " << intr.getNumResults() << ">, Arguments<(ins"
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<< (operands.empty() ? "" : " ");
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llvm::interleaveComma(operands, os);
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os << ")>;\n\n";
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return false;
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}
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/// Traverses the list of TableGen definitions derived from the "Intrinsic"
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/// class and generates MLIR ODS definitions for those intrinsics that have
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/// the name matching the filter.
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static bool emitIntrinsics(const llvm::RecordKeeper &records,
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llvm::raw_ostream &os) {
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llvm::emitSourceFileHeader("Operations for LLVM intrinsics", os);
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os << "include \"mlir/Dialect/LLVMIR/LLVMOpBase.td\"\n";
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os << "include \"mlir/Interfaces/SideEffectInterfaces.td\"\n\n";
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auto defs = records.getAllDerivedDefinitions("Intrinsic");
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for (const llvm::Record *r : defs) {
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if (!nameFilter.empty() && !r->getName().contains(nameFilter))
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continue;
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if (emitIntrinsic(*r, os))
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return true;
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}
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return false;
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}
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static mlir::GenRegistration genLLVMIRIntrinsics("gen-llvmir-intrinsics",
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"Generate LLVM IR intrinsics",
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emitIntrinsics);
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