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157 lines
5.5 KiB
157 lines
5.5 KiB
/*
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* Copyright (C) 2014 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ART_RUNTIME_ARCH_X86_INSTRUCTION_SET_FEATURES_X86_H_
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#define ART_RUNTIME_ARCH_X86_INSTRUCTION_SET_FEATURES_X86_H_
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#include "arch/instruction_set_features.h"
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#define GET_REX_R 0x04
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#define GET_REX_X 0x02
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#define GET_REX_B 0x01
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#define SET_VEX_R 0x80
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#define SET_VEX_X 0x40
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#define SET_VEX_B 0x20
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#define SET_VEX_M_0F 0x01
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#define SET_VEX_M_0F_38 0x02
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#define SET_VEX_M_0F_3A 0x03
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#define SET_VEX_W 0x80
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#define SET_VEX_L_128 0x00
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#define SET_VEL_L_256 0x04
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#define SET_VEX_PP_NONE 0x00
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#define SET_VEX_PP_66 0x01
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#define SET_VEX_PP_F3 0x02
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#define SET_VEX_PP_F2 0x03
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#define TWO_BYTE_VEX 0xC5
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#define THREE_BYTE_VEX 0xC4
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#define VEX_INIT 0x00
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namespace art {
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class X86InstructionSetFeatures;
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using X86FeaturesUniquePtr = std::unique_ptr<const X86InstructionSetFeatures>;
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// Instruction set features relevant to the X86 architecture.
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class X86InstructionSetFeatures : public InstructionSetFeatures {
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public:
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// Process a CPU variant string like "atom" or "nehalem" and create InstructionSetFeatures.
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static X86FeaturesUniquePtr FromVariant(const std::string& variant,
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std::string* error_msg,
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bool x86_64 = false);
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// Parse a bitmap and create an InstructionSetFeatures.
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static X86FeaturesUniquePtr FromBitmap(uint32_t bitmap, bool x86_64 = false);
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// Turn C pre-processor #defines into the equivalent instruction set features.
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static X86FeaturesUniquePtr FromCppDefines(bool x86_64 = false);
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// Process /proc/cpuinfo and use kRuntimeISA to produce InstructionSetFeatures.
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static X86FeaturesUniquePtr FromCpuInfo(bool x86_64 = false);
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// Process the auxiliary vector AT_HWCAP entry and use kRuntimeISA to produce
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// InstructionSetFeatures.
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static X86FeaturesUniquePtr FromHwcap(bool x86_64 = false);
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// Use assembly tests of the current runtime (ie kRuntimeISA) to determine the
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// InstructionSetFeatures. This works around kernel bugs in AT_HWCAP and /proc/cpuinfo.
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static X86FeaturesUniquePtr FromAssembly(bool x86_64 = false);
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// Use external cpu_features library.
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static X86FeaturesUniquePtr FromCpuFeatures(bool x86_64 = false);
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bool Equals(const InstructionSetFeatures* other) const override;
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bool HasAtLeast(const InstructionSetFeatures* other) const override;
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InstructionSet GetInstructionSet() const override {
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return InstructionSet::kX86;
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}
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uint32_t AsBitmap() const override;
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std::string GetFeatureString() const override;
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virtual ~X86InstructionSetFeatures() {}
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bool HasSSE4_1() const { return has_SSE4_1_; }
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bool HasPopCnt() const { return has_POPCNT_; }
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bool HasAVX2() const { return has_AVX2_; }
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bool HasAVX() const { return has_AVX_; }
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protected:
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// Parse a string of the form "ssse3" adding these to a new InstructionSetFeatures.
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std::unique_ptr<const InstructionSetFeatures>
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AddFeaturesFromSplitString(const std::vector<std::string>& features,
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std::string* error_msg) const override {
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return AddFeaturesFromSplitString(features, false, error_msg);
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}
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std::unique_ptr<const InstructionSetFeatures>
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AddFeaturesFromSplitString(const std::vector<std::string>& features,
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bool x86_64,
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std::string* error_msg) const;
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X86InstructionSetFeatures(bool has_SSSE3,
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bool has_SSE4_1,
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bool has_SSE4_2,
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bool has_AVX,
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bool has_AVX2,
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bool has_POPCNT)
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: InstructionSetFeatures(),
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has_SSSE3_(has_SSSE3),
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has_SSE4_1_(has_SSE4_1),
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has_SSE4_2_(has_SSE4_2),
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has_AVX_(has_AVX),
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has_AVX2_(has_AVX2),
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has_POPCNT_(has_POPCNT) {
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}
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static X86FeaturesUniquePtr Create(bool x86_64,
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bool has_SSSE3,
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bool has_SSE4_1,
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bool has_SSE4_2,
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bool has_AVX,
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bool has_AVX2,
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bool has_POPCNT);
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private:
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// Bitmap positions for encoding features as a bitmap.
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enum {
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kSsse3Bitfield = 1 << 0,
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kSse4_1Bitfield = 1 << 1,
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kSse4_2Bitfield = 1 << 2,
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kAvxBitfield = 1 << 3,
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kAvx2Bitfield = 1 << 4,
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kPopCntBitfield = 1 << 5,
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};
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const bool has_SSSE3_; // x86 128bit SIMD - Supplemental SSE.
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const bool has_SSE4_1_; // x86 128bit SIMD SSE4.1.
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const bool has_SSE4_2_; // x86 128bit SIMD SSE4.2.
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const bool has_AVX_; // x86 256bit SIMD AVX.
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const bool has_AVX2_; // x86 256bit SIMD AVX 2.0.
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const bool has_POPCNT_; // x86 population count
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DISALLOW_COPY_AND_ASSIGN(X86InstructionSetFeatures);
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};
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} // namespace art
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#endif // ART_RUNTIME_ARCH_X86_INSTRUCTION_SET_FEATURES_X86_H_
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