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456 lines
14 KiB
456 lines
14 KiB
/*
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* Code to dump Marvell SysKonnect registers for skge and sky2 drivers.
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*
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* Copyright (C) 2004, 2006
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* Stephen Hemminger <shemminger@osdl.org>
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*/
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#include <stdio.h>
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#include "internal.h"
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static void dump_addr(int n, const u8 *a)
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{
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int i;
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printf("Addr %d ", n);
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for (i = 0; i < 6; i++)
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printf("%02X%c", a[i], i == 5 ? '\n' : ' ');
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}
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static void dump_timer(const char *name, const void *p)
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{
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const u8 *a = p;
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const u32 *r = p;
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printf("%s\n", name);
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printf("\tInit 0x%08X Value 0x%08X\n", r[0], r[1]);
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printf("\tTest 0x%02X Control 0x%02X\n", a[8], a[9]);
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}
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static void dump_queue(const char *name, const void *a, int rx)
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{
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struct desc {
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u_int32_t ctl;
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u_int32_t next;
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u_int32_t data_lo;
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u_int32_t data_hi;
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u_int32_t status;
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u_int32_t timestamp;
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u_int16_t csum2;
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u_int16_t csum1;
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u_int16_t csum2_start;
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u_int16_t csum1_start;
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u_int32_t addr_lo;
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u_int32_t addr_hi;
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u_int32_t count_lo;
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u_int32_t count_hi;
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u_int32_t byte_count;
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u_int32_t csr;
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u_int32_t flag;
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};
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const struct desc *d = a;
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/* is reset bit set? */
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if (!(d->ctl & 2)) {
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printf("\n%s (disabled)\n", name);
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return;
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}
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printf("\n%s\n", name);
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printf("---------------\n");
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printf("Descriptor Address 0x%08X%08X\n",
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d->addr_hi, d->addr_lo);
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printf("Address Counter 0x%08X%08X\n",
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d->count_hi, d->count_lo);
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printf("Current Byte Counter %d\n", d->byte_count);
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printf("BMU Control/Status 0x%08X\n", d->csr);
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printf("Flag & FIFO Address 0x%08X\n", d->flag);
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printf("\n");
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printf("Control 0x%08X\n", d->ctl);
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printf("Next 0x%08X\n", d->next);
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printf("Data 0x%08X%08X\n",
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d->data_hi, d->data_lo);
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printf("Status 0x%08X\n", d->status);
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printf("Timestamp 0x%08X\n", d->timestamp);
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if (rx) {
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printf("Csum1 Offset %4d Position %d\n",
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d->csum1, d->csum1_start);
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printf("Csum2 Offset %4d Position %d\n",
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d->csum2, d->csum2_start);
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} else
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printf("Csum Start 0x%04X Pos %4d Write %d\n",
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d->csum1, d->csum2_start, d->csum1_start);
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}
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static void dump_ram(const char *name, const void *p)
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{
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const u32 *r = p;
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if (!(r[10] & 2)) {
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printf("\n%s (disabled)\n", name);
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return;
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}
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printf("\n%s\n", name);
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printf("---------------\n");
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printf("Start Address 0x%08X\n", r[0]);
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printf("End Address 0x%08X\n", r[1]);
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printf("Write Pointer 0x%08X\n", r[2]);
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printf("Read Pointer 0x%08X\n", r[3]);
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if (*name == 'R') { /* Receive only */
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printf("Upper Threshold/Pause Packets 0x%08X\n", r[4]);
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printf("Lower Threshold/Pause Packets 0x%08X\n", r[5]);
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printf("Upper Threshold/High Priority 0x%08X\n", r[6]);
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printf("Lower Threshold/High Priority 0x%08X\n", r[7]);
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}
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printf("Packet Counter 0x%08X\n", r[8]);
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printf("Level 0x%08X\n", r[9]);
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printf("Control 0x%08X\n", r[10]);
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}
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static void dump_fifo(const char *name, const void *p)
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{
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const u32 *r = p;
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printf("\n%s\n", name);
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printf("---------------\n");
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printf("End Address 0x%08X\n", r[0]);
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printf("Write Pointer 0x%08X\n", r[1]);
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printf("Read Pointer 0x%08X\n", r[2]);
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printf("Packet Counter 0x%08X\n", r[3]);
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printf("Level 0x%08X\n", r[4]);
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printf("Control 0x%08X\n", r[5]);
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printf("Control/Test 0x%08X\n", r[6]);
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dump_timer("LED", r + 8);
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}
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static void dump_gmac_fifo(const char *name, const void *p)
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{
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const u32 *r = p;
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int i;
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static const char *regs[] = {
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"End Address",
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"Almost Full Thresh",
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"Control/Test",
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"FIFO Flush Mask",
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"FIFO Flush Threshold",
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"Truncation Threshold",
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"Upper Pause Threshold",
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"Lower Pause Threshold",
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"VLAN Tag",
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"FIFO Write Pointer",
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"FIFO Write Level",
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"FIFO Read Pointer",
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"FIFO Read Level",
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};
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printf("\n%s\n", name);
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for (i = 0; i < sizeof(regs)/sizeof(regs[0]); ++i)
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printf("%-32s 0x%08X\n", regs[i], r[i]);
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}
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static void dump_mac(const u8 *r)
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{
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u8 id;
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printf("\nMAC Addresses\n");
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printf("---------------\n");
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dump_addr(1, r + 0x100);
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dump_addr(2, r + 0x108);
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dump_addr(3, r + 0x110);
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printf("\n");
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printf("Connector type 0x%02X (%c)\n",
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r[0x118], (char)r[0x118]);
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printf("PMD type 0x%02X (%c)\n",
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r[0x119], (char)r[0x119]);
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printf("PHY type 0x%02X\n", r[0x11d]);
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id = r[0x11b];
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printf("Chip Id 0x%02X ", id);
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switch (id) {
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case 0x0a: printf("Genesis"); break;
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case 0xb0: printf("Yukon"); break;
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case 0xb1: printf("Yukon-Lite"); break;
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case 0xb2: printf("Yukon-LP"); break;
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case 0xb3: printf("Yukon-2 XL"); break;
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case 0xb5: printf("Yukon Extreme"); break;
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case 0xb4: printf("Yukon-2 EC Ultra"); break;
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case 0xb6: printf("Yukon-2 EC"); break;
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case 0xb7: printf("Yukon-2 FE"); break;
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case 0xb8: printf("Yukon-2 FE Plus"); break;
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case 0xb9: printf("Yukon Supreme"); break;
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case 0xba: printf("Yukon Ultra 2"); break;
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case 0xbc: printf("Yukon Optima"); break;
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default: printf("(Unknown)"); break;
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}
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printf(" (rev %d)\n", (r[0x11a] & 0xf0) >> 4);
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printf("Ram Buffer 0x%02X\n", r[0x11c]);
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}
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static void dump_gma(const char *name, const u8 *r)
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{
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int i;
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printf("%12s address: ", name);
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for (i = 0; i < 3; i++) {
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u16 a = *(u16 *)(r + i * 4);
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printf(" %02X %02X", a & 0xff, (a >> 8) & 0xff);
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}
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printf("\n");
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}
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static void dump_gmac(const char *name, const u8 *data)
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{
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printf("\n%s\n", name);
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printf("Status 0x%04X\n", *(u16 *) data);
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printf("Control 0x%04X\n", *(u16 *) (data + 4));
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printf("Transmit 0x%04X\n", *(u16 *) (data + 8));
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printf("Receive 0x%04X\n", *(u16 *) (data + 0xc));
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printf("Transmit flow control 0x%04X\n", *(u16 *) (data + 0x10));
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printf("Transmit parameter 0x%04X\n", *(u16 *) (data + 0x14));
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printf("Serial mode 0x%04X\n", *(u16 *) (data + 0x18));
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dump_gma("Source", data + 0x1c);
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dump_gma("Physical", data + 0x28);
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}
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static void dump_pci(const u8 *cfg)
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{
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int i;
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printf("\nPCI config\n----------\n");
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for(i = 0; i < 0x80; i++) {
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if (!(i & 15))
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printf("%02x:", i);
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printf(" %02x", cfg[i]);
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if ((i & 15) == 15)
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putchar('\n');
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}
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putchar('\n');
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}
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static void dump_control(u8 *r)
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{
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printf("Control Registers\n");
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printf("-----------------\n");
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printf("Register Access Port 0x%02X\n", *r);
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printf("LED Control/Status 0x%08X\n", *(u32 *) (r + 4));
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printf("Interrupt Source 0x%08X\n", *(u32 *) (r + 8));
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printf("Interrupt Mask 0x%08X\n", *(u32 *) (r + 0xc));
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printf("Interrupt Hardware Error Source 0x%08X\n", *(u32 *) (r + 0x10));
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printf("Interrupt Hardware Error Mask 0x%08X\n", *(u32 *) (r + 0x14));
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printf("Interrupt Control 0x%08X\n", *(u32 *) (r + 0x2c));
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printf("Interrupt Moderation Mask 0x%08X\n", *(u32 *) (r + 0x14c));
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printf("Hardware Moderation Mask 0x%08X\n", *(u32 *) (r + 0x150));
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dump_timer("Moderation Timer", r + 0x140);
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printf("General Purpose I/O 0x%08X\n", *(u32 *) (r + 0x15c));
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}
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int skge_dump_regs(struct ethtool_drvinfo *info maybe_unused,
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struct ethtool_regs *regs)
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{
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const u32 *r = (const u32 *) regs->data;
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int dual = !(regs->data[0x11a] & 1);
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dump_pci(regs->data + 0x380);
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dump_control(regs->data);
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printf("\nBus Management Unit\n");
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printf("-------------------\n");
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printf("CSR Receive Queue 1 0x%08X\n", r[24]);
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printf("CSR Sync Queue 1 0x%08X\n", r[26]);
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printf("CSR Async Queue 1 0x%08X\n", r[27]);
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if (dual) {
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printf("CSR Receive Queue 2 0x%08X\n", r[25]);
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printf("CSR Async Queue 2 0x%08X\n", r[29]);
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printf("CSR Sync Queue 2 0x%08X\n", r[28]);
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}
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dump_mac(regs->data);
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dump_gmac("GMAC 1", regs->data + 0x2800);
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dump_timer("Timer", regs->data + 0x130);
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dump_timer("Blink Source", regs->data +0x170);
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dump_queue("Receive Queue 1", regs->data +0x400, 1);
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dump_queue("Sync Transmit Queue 1", regs->data +0x600, 0);
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dump_queue("Async Transmit Queue 1", regs->data +0x680, 0);
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dump_ram("Receive RAMbuffer 1", regs->data+0x800);
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dump_ram("Sync Transmit RAMbuffer 1", regs->data+0xa00);
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dump_ram("Async Transmit RAMbuffer 1", regs->data+0xa80);
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dump_fifo("Receive MAC FIFO 1", regs->data+0xc00);
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dump_fifo("Transmit MAC FIFO 1", regs->data+0xd00);
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if (dual) {
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dump_gmac("GMAC 1", regs->data + 0x2800);
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dump_queue("Receive Queue 2", regs->data +0x480, 1);
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dump_queue("Async Transmit Queue 2", regs->data +0x780, 0);
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dump_queue("Sync Transmit Queue 2", regs->data +0x700, 0);
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dump_ram("Receive RAMbuffer 2", regs->data+0x880);
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dump_ram("Sync Transmit RAMbuffer 2", regs->data+0xb00);
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dump_ram("Async Transmit RAMbuffer 21", regs->data+0xb80);
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dump_fifo("Receive MAC FIFO 2", regs->data+0xc80);
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dump_fifo("Transmit MAC FIFO 2", regs->data+0xd80);
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}
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dump_timer("Descriptor Poll", regs->data+0xe00);
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return 0;
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}
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static void dump_queue2(const char *name, void *a, int rx)
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{
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struct sky2_queue {
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u16 buf_control;
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u16 byte_count;
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u32 rss;
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u32 addr_lo, addr_hi;
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u32 status;
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u32 timestamp;
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u16 csum1, csum2;
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u16 csum1_start, csum2_start;
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u16 length;
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u16 vlan;
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u16 rsvd1;
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u16 done;
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u32 req_lo, req_hi;
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u16 rsvd2;
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u16 req_count;
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u32 csr;
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} *d = a;
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printf("\n%s\n", name);
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printf("---------------\n");
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printf("Buffer control 0x%04X\n", d->buf_control);
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printf("Byte Counter %d\n", d->byte_count);
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printf("Descriptor Address 0x%08X%08X\n",
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d->addr_hi, d->addr_lo);
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printf("Status 0x%08X\n", d->status);
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printf("Timestamp 0x%08X\n", d->timestamp);
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printf("BMU Control/Status 0x%08X\n", d->csr);
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printf("Done 0x%04X\n", d->done);
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printf("Request 0x%08X%08X\n",
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d->req_hi, d->req_lo);
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if (rx) {
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printf("Csum1 Offset %4d Position %d\n",
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d->csum1, d->csum1_start);
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printf("Csum2 Offset %4d Position %d\n",
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d->csum2, d->csum2_start);
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} else
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printf("Csum Start 0x%04X Pos %4d Write %d\n",
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d->csum1, d->csum2_start, d->csum1_start);
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}
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static void dump_prefetch(const char *name, const void *r)
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{
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const u32 *reg = r;
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printf("\n%s Prefetch\n", name);
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printf("Control 0x%08X\n", reg[0]);
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printf("Last Index %u\n", reg[1]);
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printf("Start Address 0x%08x%08x\n", reg[3], reg[2]);
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if (*name == 'S') { /* Status unit */
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printf("TX1 report %u\n", reg[4]);
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printf("TX2 report %u\n", reg[5]);
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printf("TX threshold %u\n", reg[6]);
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printf("Put Index %u\n", reg[7]);
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} else {
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printf("Get Index %u\n", reg[4]);
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printf("Put Index %u\n", reg[5]);
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}
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}
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int sky2_dump_regs(struct ethtool_drvinfo *info maybe_unused,
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struct ethtool_regs *regs)
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{
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const u16 *r16 = (const u16 *) regs->data;
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const u32 *r32 = (const u32 *) regs->data;
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int dual;
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dump_pci(regs->data + 0x1c00);
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dump_control(regs->data);
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printf("\nBus Management Unit\n");
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printf("-------------------\n");
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printf("CSR Receive Queue 1 0x%08X\n", r32[24]);
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printf("CSR Sync Queue 1 0x%08X\n", r32[26]);
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printf("CSR Async Queue 1 0x%08X\n", r32[27]);
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dual = (regs->data[0x11e] & 2) != 0;
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if (dual) {
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printf("CSR Receive Queue 2 0x%08X\n", r32[25]);
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printf("CSR Async Queue 2 0x%08X\n", r32[29]);
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printf("CSR Sync Queue 2 0x%08X\n", r32[28]);
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}
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dump_mac(regs->data);
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dump_prefetch("Status", regs->data + 0xe80);
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dump_prefetch("Receive 1", regs->data + 0x450);
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dump_prefetch("Transmit 1", regs->data + 0x450 + 0x280);
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if (dual) {
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dump_prefetch("Receive 2", regs->data + 0x450 + 0x80);
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dump_prefetch("Transmit 2", regs->data + 0x450 + 0x380);
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}
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printf("\nStatus FIFO\n");
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printf("\tWrite Pointer 0x%02X\n", regs->data[0xea0]);
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printf("\tRead Pointer 0x%02X\n", regs->data[0xea4]);
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printf("\tLevel 0x%02X\n", regs->data[0xea8]);
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printf("\tWatermark 0x%02X\n", regs->data[0xeac]);
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printf("\tISR Watermark 0x%02X\n", regs->data[0xead]);
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dump_timer("Status level", regs->data + 0xeb0);
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dump_timer("TX status", regs->data + 0xec0);
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dump_timer("ISR", regs->data + 0xed0);
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printf("\nGMAC control 0x%04X\n", r32[0xf00 >> 2]);
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printf("GPHY control 0x%04X\n", r32[0xf04 >> 2]);
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printf("LINK control 0x%02hX\n", r16[0xf10 >> 1]);
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dump_gmac("GMAC 1", regs->data + 0x2800);
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dump_gmac_fifo("Rx GMAC 1", regs->data + 0xc40);
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dump_gmac_fifo("Tx GMAC 1", regs->data + 0xd40);
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dump_queue2("Receive Queue 1", regs->data +0x400, 1);
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dump_queue("Sync Transmit Queue 1", regs->data +0x600, 0);
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dump_queue2("Async Transmit Queue 1", regs->data +0x680, 0);
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dump_ram("Receive RAMbuffer 1", regs->data+0x800);
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dump_ram("Sync Transmit RAMbuffer 1", regs->data+0xa00);
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dump_ram("Async Transmit RAMbuffer 1", regs->data+0xa80);
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if (dual) {
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dump_ram("Receive RAMbuffer 2", regs->data+0x880);
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dump_ram("Sync Transmit RAMbuffer 2", regs->data+0xb00);
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dump_ram("Async Transmit RAMbuffer 21", regs->data+0xb80);
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dump_gmac("GMAC 2", regs->data + 0x3800);
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dump_gmac_fifo("Rx GMAC 2", regs->data + 0xc40 + 128);
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dump_gmac_fifo("Tx GMAC 2", regs->data + 0xd40 + 128);
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}
|
|
|
|
return 0;
|
|
}
|