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379 lines
9.2 KiB
379 lines
9.2 KiB
/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "igt.h"
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/*
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* internal use
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* Common test data
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* */
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typedef struct {
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int drm_fd;
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int width;
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int height;
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enum pipe pipe_id;
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igt_display_t display;
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igt_plane_t *primary;
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igt_output_t *output;
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igt_pipe_t *pipe;
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igt_pipe_crc_t *pipe_crc;
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igt_crc_t crc_fb;
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igt_crc_t crc_dprx;
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drmModeModeInfo *mode;
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} data_t;
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enum pattern {
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TEST_PATTERN_DP_COLOR_RAMP,
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TEST_PATTERN_DP_BLACK_WHITE_VERT_LINES,
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TEST_PATTERN_DP_BLACK_WHITE_HORZ_LINES,
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TEST_PATTERN_DP_COLOR_SQUARES_VESA,
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/* please don't add pattern after the below line */
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TEST_PATTERN_MAX,
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};
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const char *ptnstr[TEST_PATTERN_MAX] = {
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"DP Color Ramp",
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"DP Vertical Lines",
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"DP Horizontal Lines",
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"DP Color Squares VESA"
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};
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/* Common test setup. */
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static void test_init(data_t *data)
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{
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igt_display_t *display = &data->display;
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/* It doesn't matter which pipe we choose on amdpgu. */
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data->pipe_id = PIPE_A;
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data->pipe = &data->display.pipes[data->pipe_id];
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igt_display_reset(display);
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data->output = igt_get_single_output_for_pipe(display, data->pipe_id);
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igt_assert(data->output);
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data->mode = igt_output_get_mode(data->output);
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igt_assert(data->mode);
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data->primary =
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igt_pipe_get_plane_type(data->pipe, DRM_PLANE_TYPE_PRIMARY);
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data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe_id,
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AMDGPU_PIPE_CRC_SOURCE_DPRX);
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igt_output_set_pipe(data->output, data->pipe_id);
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data->width = data->mode->hdisplay;
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data->height = data->mode->vdisplay;
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}
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/* Common test cleanup. */
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static void test_fini(data_t *data)
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{
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igt_pipe_crc_free(data->pipe_crc);
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igt_display_reset(&data->display);
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}
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/*
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* draw the DP color ramp test pattern
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* Reference: DP Link CTS 1.2 Core r1.1, sec. 3.1.5.1
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*/
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static void draw_dp_test_pattern_color_ramp(igt_fb_t *fb)
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{
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const int h = 64; /* test pattern rectangle height */
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const int block_h = h * 4; /* block height of R-G-B-White rectangles */
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void *ptr_fb;
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uint8_t *data;
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int x,y;
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int i;
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uint8_t val;
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/*
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* 64-by-256 pixels per rectangle
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* R-G-B-White rectangle in order in vertical
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* duplicate in horizontal
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*/
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ptr_fb = igt_fb_map_buffer(fb->fd, fb);
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igt_assert(ptr_fb);
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data = ptr_fb + fb->offsets[0];
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switch (fb->drm_format) {
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case DRM_FORMAT_XRGB8888:
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for (y = 0; y < fb->height; ++y) {
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for (x = 0, val = 0; x < fb->width; ++x, ++val) {
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i = x * 4 + y * fb->strides[0];
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/* vertical R-G-B-White rect */
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if ((y % block_h) < h) { /* Red */
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data[i + 2] = val;
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data[i + 1] = 0;
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data[i + 0] = 0;
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} else if ((y % block_h) < 2 * h) { /* Green */
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data[i + 2] = 0;
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data[i + 1] = val;
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data[i + 0] = 0;
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} else if ((y % block_h) < 3 * h) { /* Blue */
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data[i + 2] = 0;
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data[i + 1] = 0;
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data[i + 0] = val;
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} else { /* White */
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data[i + 2] = val;
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data[i + 1] = val;
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data[i + 0] = val;
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}
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}
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}
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break;
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default:
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igt_assert_f(0, "DRM Format Invalid");
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break;
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}
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igt_fb_unmap_buffer(fb, ptr_fb);
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}
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/*
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* draw the DP vertical lines test pattern
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* Reference: DP Link CTS 1.2 Core r1.1, sec. 3.1.5.2
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*/
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static void draw_dp_test_pattern_vert_lines(igt_fb_t *fb)
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{
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void *ptr_fb;
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uint8_t *data;
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int x, y;
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int i;
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/* alternating black and white lines, 1 pixel wide */
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ptr_fb = igt_fb_map_buffer(fb->fd, fb);
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igt_assert(ptr_fb);
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data = ptr_fb + fb->offsets[0];
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switch (fb->drm_format) {
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case DRM_FORMAT_XRGB8888:
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for (y = 0; y < fb->height; ++y) {
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for (x = 0; x < fb->width; ++x) {
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i = x * 4 + y * fb->strides[0];
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if ((x & 1) == 0) {
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data[i + 2] = 0xff; /* R */
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data[i + 1] = 0xff; /* G */
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data[i + 0] = 0xff; /* B */
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} else {
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data[i + 2] = 0;
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data[i + 1] = 0;
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data[i + 0] = 0;
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}
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}
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}
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break;
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default:
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igt_assert_f(0, "DRM Format Invalid");
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break;
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}
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igt_fb_unmap_buffer(fb, ptr_fb);
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}
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/* draw the DP horizontal lines test pattern */
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static void draw_dp_test_pattern_horz_lines(igt_fb_t *fb)
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{
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void *ptr_fb;
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uint8_t *data;
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int x, y;
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int i;
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/* alternating black and white horizontal lines, 1 pixel high */
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ptr_fb = igt_fb_map_buffer(fb->fd, fb);
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igt_assert(ptr_fb);
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data = ptr_fb + fb->offsets[0];
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switch (fb->drm_format) {
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case DRM_FORMAT_XRGB8888:
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for (y = 0; y < fb->height; ++y) {
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for (x = 0; x < fb->width; ++x) {
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i = x * 4 + y * fb->strides[0];
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if ((y & 1) == 0) {
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data[i + 2] = 0xff; /* R */
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data[i + 1] = 0xff; /* G */
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data[i + 0] = 0xff; /* B */
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} else {
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data[i + 2] = 0;
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data[i + 1] = 0;
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data[i + 0] = 0;
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}
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}
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}
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break;
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default:
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igt_assert_f(0, "DRM Format Invalid");
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break;
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}
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igt_fb_unmap_buffer(fb, ptr_fb);
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}
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/*
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* draw the DP color squares VESA test pattern
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* Reference: DP Link CTS 1.2 Core r1.1, sec. 3.1.5.3
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*/
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static void draw_dp_test_pattern_color_squares_vesa(igt_fb_t *fb)
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{
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const int h = 64; /* test pattern square height/width */
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const int block_h = h * 2; /* block height of the repetition pattern */
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const int block_w = h * 8; /* block width of the repetition pattern */
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const uint8_t rgb[3][2][8] = {
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{/* Red table of the pattern squares */
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{255, 255, 0, 0, 255, 255, 0, 0},
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{0, 255, 255, 0, 0, 255, 255, 0},
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},
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{/* Green table */
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{255, 255, 255, 255, 0, 0, 0, 0},
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{0, 0, 0, 255, 255, 255, 255, 0},
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},
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{/* Blue table */
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{255, 0, 255, 0, 255, 0, 255, 0},
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{255, 0, 255, 0, 255, 0, 255, 0},
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},
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};
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void *ptr_fb;
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uint8_t *data;
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int x, y;
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int i, j, k;
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ptr_fb = igt_fb_map_buffer(fb->fd, fb);
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igt_assert(ptr_fb);
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data = ptr_fb + fb->offsets[0];
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switch (fb->drm_format) {
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case DRM_FORMAT_XRGB8888:
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for (y = 0; y < fb->height; ++y) {
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for (x = 0; x < fb->width; ++x) {
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i = x * 4 + y * fb->strides[0];
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j = (y % block_h) / h;
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k = (x % block_w) / h;
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data[i + 2] = rgb[0][j][k]; /* R */
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data[i + 1] = rgb[1][j][k]; /* G */
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data[i + 0] = rgb[2][j][k]; /* B */
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}
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}
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break;
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default:
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igt_assert_f(0, "DRM Format Invalid");
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break;
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}
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igt_fb_unmap_buffer(fb, ptr_fb);
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}
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/* generate test pattern and fills a FB */
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static void generate_test_pattern(igt_fb_t *fb, data_t *data, enum pattern ptn)
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{
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igt_assert(fb->fd && (ptn < TEST_PATTERN_MAX));
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if (ptn == TEST_PATTERN_DP_COLOR_RAMP) {
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draw_dp_test_pattern_color_ramp(fb);
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} else if (ptn == TEST_PATTERN_DP_BLACK_WHITE_VERT_LINES) {
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draw_dp_test_pattern_vert_lines(fb);
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} else if (ptn == TEST_PATTERN_DP_BLACK_WHITE_HORZ_LINES) {
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draw_dp_test_pattern_horz_lines(fb);
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} else if (ptn == TEST_PATTERN_DP_COLOR_SQUARES_VESA) {
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draw_dp_test_pattern_color_squares_vesa(fb);
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}
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}
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static void bypass_8bpc_test(data_t *data)
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{
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igt_display_t *display = &data->display;
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igt_fb_t fb;
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enum pattern ptn;
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test_init(data);
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igt_create_fb(data->drm_fd, data->width, data->height,
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DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &fb);
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/*
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* Settings:
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* no degamma
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* no regamma
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* no CTM
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*/
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igt_pipe_obj_replace_prop_blob(data->pipe, IGT_CRTC_DEGAMMA_LUT, NULL, 0);
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igt_pipe_obj_replace_prop_blob(data->pipe, IGT_CRTC_GAMMA_LUT, NULL, 0);
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igt_pipe_obj_replace_prop_blob(data->pipe, IGT_CRTC_CTM, NULL, 0);
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igt_plane_set_fb(data->primary, &fb);
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igt_display_commit_atomic(display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
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/* traverse all the test pattern to validate 8bpc bypass mode */
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for (ptn = TEST_PATTERN_DP_COLOR_RAMP; ptn < TEST_PATTERN_MAX; ++ptn) {
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igt_info("Test Pattern: %s\n", ptnstr[ptn]);
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generate_test_pattern(&fb, data, ptn);
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/* Grab FB and DPRX CRCs and compare */
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igt_fb_calc_crc(&fb, &data->crc_fb);
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igt_pipe_crc_collect_crc(data->pipe_crc, &data->crc_dprx);
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igt_assert_crc_equal(&data->crc_fb, &data->crc_dprx);
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}
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igt_plane_set_fb(data->primary, NULL);
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test_fini(data);
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igt_remove_fb(data->drm_fd, &fb);
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}
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igt_main
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{
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data_t data;
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memset(&data, 0, sizeof(data));
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igt_skip_on_simulation();
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igt_fixture {
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data.drm_fd = drm_open_driver_master(DRIVER_AMDGPU);
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if (data.drm_fd == -1)
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igt_skip("Not an amdgpu driver.\n");
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igt_require_pipe_crc(data.drm_fd);
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kmstest_set_vt_graphics_mode();
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igt_display_require(&data.display, data.drm_fd);
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igt_require(data.display.is_atomic);
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igt_display_require_output(&data.display);
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}
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igt_subtest("8bpc-bypass-mode")
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bypass_8bpc_test(&data);
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igt_fixture {
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igt_display_fini(&data.display);
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}
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}
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