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542 lines
14 KiB
542 lines
14 KiB
/*
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* Copyright © 2017-2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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*
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*/
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#include "igt.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <signal.h>
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#include <errno.h>
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#include <time.h>
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#include <sys/mman.h>
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#include <sys/wait.h>
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#include "igt_dummyload.h"
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#include "igt_perf.h"
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#include "igt_sysfs.h"
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#include "ioctl_wrappers.h"
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IGT_TEST_DESCRIPTION("Test context render powergating programming.");
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static unsigned int __intel_gen__, __intel_devid__;
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static uint64_t __slice_mask__, __subslice_mask__;
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static unsigned int __slice_count__, __subslice_count__;
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static uint64_t mask_minus_one(uint64_t mask)
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{
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unsigned int i;
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for (i = 0; i < (sizeof(mask) * 8 - 1); i++) {
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if ((1ULL << i) & mask)
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return mask & ~(1ULL << i);
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}
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igt_assert(0);
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return 0;
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}
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static uint64_t mask_plus_one(uint64_t mask)
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{
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unsigned int i;
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for (i = 0; i < (sizeof(mask) * 8 - 1); i++) {
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if (((1ULL << i) & mask) == 0)
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return mask | (1ULL << i);
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}
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igt_assert(0);
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return 0;
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}
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static uint64_t mask_minus(uint64_t mask, int n)
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{
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unsigned int i;
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for (i = 0; i < n; i++)
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mask = mask_minus_one(mask);
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return mask;
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}
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static uint64_t mask_plus(uint64_t mask, int n)
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{
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unsigned int i;
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for (i = 0; i < n; i++)
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mask = mask_plus_one(mask);
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return mask;
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}
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static bool
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kernel_has_per_context_sseu_support(int fd)
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{
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struct drm_i915_gem_context_param_sseu sseu = { };
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struct drm_i915_gem_context_param arg = {
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.param = I915_CONTEXT_PARAM_SSEU,
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.size = sizeof(sseu),
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.value = to_user_pointer(&sseu),
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};
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int ret;
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if (__gem_context_get_param(fd, &arg))
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return false;
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arg.value = to_user_pointer(&sseu);
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ret = __gem_context_set_param(fd, &arg);
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igt_assert(ret == 0 || ret == -ENODEV || ret == -EINVAL);
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return ret == 0;
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}
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static bool has_engine(int fd, unsigned int class, unsigned int instance)
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{
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int pmu = perf_i915_open(I915_PMU_ENGINE_BUSY(class, instance));
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if (pmu >= 0)
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close(pmu);
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return pmu >= 0;
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}
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/*
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* Verify that invalid engines are rejected and valid ones are accepted.
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*/
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static void test_engines(int fd)
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{
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struct drm_i915_gem_context_param_sseu sseu = { };
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struct drm_i915_gem_context_param arg = {
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.param = I915_CONTEXT_PARAM_SSEU,
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.ctx_id = gem_context_create(fd),
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.size = sizeof(sseu),
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.value = to_user_pointer(&sseu)
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};
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unsigned int class, instance;
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int last_with_engines;
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/* get_param */
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sseu.engine.engine_instance = -1; /* Assumed invalid. */
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EINVAL);
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sseu.engine.engine_class = I915_ENGINE_CLASS_INVALID; /* Both invalid. */
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EINVAL);
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sseu.engine.engine_instance = 0; /* Class invalid. */
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EINVAL);
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sseu.engine.engine_class = I915_ENGINE_CLASS_RENDER;
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last_with_engines = -1;
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for (class = 0; class < ~0; class++) {
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for (instance = 0; instance < ~0; instance++) {
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int ret;
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sseu.engine.engine_class = class;
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sseu.engine.engine_instance = instance;
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ret = __gem_context_get_param(fd, &arg);
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if (has_engine(fd, class, instance)) {
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igt_assert_eq(ret, 0);
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last_with_engines = class;
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} else {
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igt_assert_eq(ret, -EINVAL);
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if (instance > 8) /* Skip over some instance holes. */
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break;
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}
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}
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if (class - last_with_engines > 8) /* Skip over some class holes. */
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break;
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}
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/*
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* Get some proper values before trying to reprogram them onto
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* an invalid engine.
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*/
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sseu.engine.engine_class = 0;
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sseu.engine.engine_instance = 0;
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gem_context_get_param(fd, &arg);
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/* set_param */
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sseu.engine.engine_instance = -1; /* Assumed invalid. */
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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sseu.engine.engine_class = I915_ENGINE_CLASS_INVALID; /* Both invalid. */
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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sseu.engine.engine_instance = 0; /* Class invalid. */
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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last_with_engines = -1;
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for (class = 0; class < ~0; class++) {
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for (instance = 0; instance < ~0; instance++) {
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int ret;
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sseu.engine.engine_class = class;
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sseu.engine.engine_instance = instance;
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ret = __gem_context_set_param(fd, &arg);
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if (has_engine(fd, class, instance)) {
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igt_assert(ret == 0 || ret == -ENODEV);
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last_with_engines = class;
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} else {
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igt_assert_eq(ret, -EINVAL);
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if (instance > 8) /* Skip over some instance holes. */
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break;
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}
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}
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if (class - last_with_engines > 8) /* Skip over some class holes. */
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break;
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}
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gem_context_destroy(fd, arg.ctx_id);
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}
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/*
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* Verify that invalid arguments are rejected.
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*/
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static void
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test_invalid_args(int fd)
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{
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struct drm_i915_gem_context_param arg = {
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.param = I915_CONTEXT_PARAM_SSEU,
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.ctx_id = gem_context_create(fd),
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};
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struct drm_i915_gem_context_param_sseu sseu = { };
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unsigned char *page[2];
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unsigned char *addr;
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unsigned int sz;
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/* get param */
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/* Invalid size. */
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arg.size = 1;
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EINVAL);
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/* Query size. */
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arg.size = 0;
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igt_assert_eq(__gem_context_get_param(fd, &arg), 0);
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sz = arg.size;
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/* Bad pointers. */
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EFAULT);
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arg.value = -1;
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EFAULT);
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arg.value = 1;
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EFAULT);
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/* Unmapped. */
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page[0] = mmap(0, 4096, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
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igt_assert(page[0] != MAP_FAILED);
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memset(page[0], 0, sizeof(sseu));
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munmap(page[0], 4096);
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arg.value = to_user_pointer(page[0]);
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EFAULT);
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/* Straddle into unmapped area. */
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page[0] = mmap(0, 8192, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
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igt_assert(page[0] != MAP_FAILED);
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munmap(page[0], 8192);
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page[0] = mmap(page[0], 4096,
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PROT_WRITE, MAP_PRIVATE | MAP_ANON | MAP_FIXED, -1, 0);
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igt_assert(page[0] != MAP_FAILED);
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memset(page[0], 0, sizeof(sseu));
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page[1] = mmap((void *)((unsigned long)page[0] + 4096), 4096,
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PROT_WRITE, MAP_PRIVATE | MAP_ANON | MAP_FIXED, -1, 0);
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igt_assert(page[1] != MAP_FAILED);
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memset(page[1], 0, sizeof(sseu));
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munmap(page[1], 4096);
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arg.value = to_user_pointer(page[1]) -
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sizeof(struct drm_i915_gem_context_param_sseu) + 4;
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EFAULT);
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munmap(page[0], 4096);
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/* Straddle into read-only area. */
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page[0] = mmap(0, 8192, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
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igt_assert(page[0] != MAP_FAILED);
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munmap(page[0], 8192);
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page[0] = mmap(page[0], 4096,
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PROT_WRITE, MAP_PRIVATE | MAP_ANON | MAP_FIXED, -1, 0);
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igt_assert(page[0] != MAP_FAILED);
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memset(page[0], 0, sizeof(sseu));
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page[1] = mmap((void *)((unsigned long)page[0] + 4096), 4096,
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PROT_WRITE, MAP_PRIVATE | MAP_ANON | MAP_FIXED, -1, 0);
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igt_assert(page[1] != MAP_FAILED);
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memset(page[1], 0, sizeof(sseu));
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igt_assert(mprotect(page[1], 4096, PROT_READ) == 0);
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arg.value = to_user_pointer(page[1] - sizeof(sseu) + 4);
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igt_assert_eq(__gem_context_get_param(fd, &arg), -EFAULT);
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munmap(page[0], 4096);
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munmap(page[1], 4096);
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/* set param */
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/* Invalid sizes. */
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arg.size = 1;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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arg.size = 0;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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arg.size = sz;
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/* Bad pointers. */
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arg.value = 0;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EFAULT);
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arg.value = -1;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EFAULT);
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arg.value = 1;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EFAULT);
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/* Get valid SSEU. */
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arg.value = to_user_pointer(&sseu);
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igt_assert_eq(__gem_context_get_param(fd, &arg), 0);
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/* Invalid MBZ. */
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sseu.flags = -1;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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sseu.rsvd = -1;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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sseu.flags = 0;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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sseu.rsvd = 0;
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/* Unmapped. */
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page[0] = mmap(0, 4096, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
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igt_assert(page[0] != MAP_FAILED);
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memcpy(page[0], &sseu, sizeof(sseu));
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munmap(page[0], 4096);
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arg.value = to_user_pointer(page[0]);
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EFAULT);
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/* Straddle into unmapped area. */
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page[0] = mmap(0, 8192, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
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igt_assert(page[0] != MAP_FAILED);
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munmap(page[0], 8192);
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page[0] = mmap(page[0], 4096,
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PROT_WRITE, MAP_PRIVATE | MAP_ANON | MAP_FIXED, -1, 0);
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igt_assert(page[0] != MAP_FAILED);
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page[1] = mmap((void *)((unsigned long)page[0] + 4096), 4096,
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PROT_WRITE, MAP_PRIVATE | MAP_ANON | MAP_FIXED, -1, 0);
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igt_assert(page[1] != MAP_FAILED);
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addr = page[1] - sizeof(sseu) + 4;
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memcpy(addr, &sseu, sizeof(sseu));
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munmap(page[1], 4096);
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arg.value = to_user_pointer(addr);
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EFAULT);
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munmap(page[0], 4096);
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gem_context_destroy(fd, arg.ctx_id);
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}
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/*
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* Verify that ggtt mapped area can be used as the sseu pointer.
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*/
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static void
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test_ggtt_args(int fd)
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{
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struct drm_i915_gem_context_param_sseu *sseu;
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struct drm_i915_gem_context_param arg = {
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.param = I915_CONTEXT_PARAM_SSEU,
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.ctx_id = gem_context_create(fd),
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.size = sizeof(*sseu),
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};
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uint32_t bo;
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bo = gem_create(fd, 4096);
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arg.value = to_user_pointer(gem_mmap__gtt(fd, bo, 4096,
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PROT_READ | PROT_WRITE));
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igt_assert_eq(__gem_context_get_param(fd, &arg), 0);
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igt_assert_eq(__gem_context_set_param(fd, &arg), 0);
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munmap((void *)(uintptr_t)arg.value, 4096);
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gem_close(fd, bo);
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gem_context_destroy(fd, arg.ctx_id);
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}
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/*
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* Verify that invalid SSEU values are rejected.
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*/
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static void
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test_invalid_sseu(int fd)
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{
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struct drm_i915_gem_context_param_sseu device_sseu = { };
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struct drm_i915_gem_context_param_sseu sseu = { };
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struct drm_i915_gem_context_param arg = {
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.param = I915_CONTEXT_PARAM_SSEU,
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.ctx_id = gem_context_create(fd),
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.size = sizeof(sseu),
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};
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unsigned int i;
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/* Fetch the device defaults. */
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arg.value = to_user_pointer(&device_sseu);
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gem_context_get_param(fd, &arg);
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arg.value = to_user_pointer(&sseu);
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/* Try all slice masks known to be invalid. */
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sseu = device_sseu;
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for (i = 1; i <= (8 - __slice_count__); i++) {
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sseu.slice_mask = mask_plus(__slice_mask__, i);
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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}
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/* 0 slices. */
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sseu.slice_mask = 0;
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igt_assert_eq(-EINVAL, __gem_context_set_param(fd, &arg));
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/* Try all subslice masks known to be invalid. */
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sseu = device_sseu;
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for (i = 1; i <= (8 - __subslice_count__); i++) {
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sseu.subslice_mask = mask_plus(__subslice_mask__, i);
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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}
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/* 0 subslices. */
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sseu.subslice_mask = 0;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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/* Try number of EUs superior to the max available. */
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sseu = device_sseu;
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sseu.min_eus_per_subslice = device_sseu.max_eus_per_subslice + 1;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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sseu = device_sseu;
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sseu.max_eus_per_subslice = device_sseu.max_eus_per_subslice + 1;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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/* Try to program 0 max EUs. */
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sseu = device_sseu;
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sseu.max_eus_per_subslice = 0;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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/* Min > max */
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sseu = device_sseu;
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sseu.min_eus_per_subslice = sseu.max_eus_per_subslice;
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sseu.max_eus_per_subslice = 1;
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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if (__intel_gen__ != 11)
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goto out;
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/* Subset of subslices but slice mask greater than one. */
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if (__slice_count__ > 1) {
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sseu = device_sseu;
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sseu.subslice_mask = mask_minus_one(sseu.subslice_mask);
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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}
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/* Odd subslices above four. */
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sseu = device_sseu;
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sseu.slice_mask = 0x1;
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sseu.subslice_mask = mask_minus_one(sseu.subslice_mask);
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igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
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|
|
/* More than half subslices with one slice. */
|
|
sseu = device_sseu;
|
|
sseu.slice_mask = 0x1;
|
|
sseu.subslice_mask = mask_minus(sseu.subslice_mask,
|
|
__subslice_count__ / 2 - 1);
|
|
igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
|
|
|
|
/* VME */
|
|
|
|
/* Slice count between one and max. */
|
|
if (__slice_count__ > 2) {
|
|
sseu = device_sseu;
|
|
sseu.slice_mask = mask_minus_one(sseu.slice_mask);
|
|
igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
|
|
}
|
|
|
|
/* Less than half subslices with one slice. */
|
|
sseu = device_sseu;
|
|
sseu.slice_mask = 0x1;
|
|
sseu.subslice_mask = mask_minus(sseu.subslice_mask,
|
|
__subslice_count__ / 2 + 1);
|
|
igt_assert_eq(__gem_context_set_param(fd, &arg), -EINVAL);
|
|
|
|
out:
|
|
gem_context_destroy(fd, arg.ctx_id);
|
|
}
|
|
|
|
igt_main
|
|
{
|
|
int fd;
|
|
|
|
igt_fixture {
|
|
fd = drm_open_driver(DRIVER_INTEL);
|
|
igt_require_gem(fd);
|
|
|
|
__intel_devid__ = intel_get_drm_devid(fd);
|
|
__intel_gen__ = intel_gen(__intel_devid__);
|
|
|
|
igt_require(kernel_has_per_context_sseu_support(fd));
|
|
}
|
|
|
|
igt_subtest_group {
|
|
igt_fixture {
|
|
drm_i915_getparam_t gp;
|
|
|
|
gp.param = I915_PARAM_SLICE_MASK;
|
|
gp.value = (int *) &__slice_mask__;
|
|
do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
|
|
__slice_count__ = __builtin_popcount(__slice_mask__);
|
|
|
|
gp.param = I915_PARAM_SUBSLICE_MASK;
|
|
gp.value = (int *) &__subslice_mask__;
|
|
do_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
|
|
__subslice_count__ =
|
|
__builtin_popcount(__subslice_mask__);
|
|
}
|
|
|
|
igt_subtest("invalid-args")
|
|
test_invalid_args(fd);
|
|
|
|
igt_subtest("invalid-sseu")
|
|
test_invalid_sseu(fd);
|
|
|
|
igt_subtest("ggtt-args")
|
|
test_ggtt_args(fd);
|
|
|
|
igt_subtest("engines")
|
|
test_engines(fd);
|
|
}
|
|
|
|
igt_fixture {
|
|
close(fd);
|
|
}
|
|
}
|