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190 lines
4.9 KiB
190 lines
4.9 KiB
/*
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* Copyright © 2011 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Chris Wilson <chris@chris-wilson.co.uk>
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*
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <inttypes.h>
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#include <errno.h>
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#include "igt.h"
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IGT_TEST_DESCRIPTION("Test execbuf fence accounting.");
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#define WIDTH 1024
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#define HEIGHT 1024
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#define OBJECT_SIZE (4*WIDTH*HEIGHT)
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#define BATCH_SIZE 4096
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#define MAX_FENCES 64
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/*
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* Testcase: execbuf fence accounting
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*
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* We had a bug where we were falsely accounting upon reservation already
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* fenced buffers as occupying a fence register even if they did not require
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* one for the batch.
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*
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* We aim to exercise this by performing a sequence of fenced BLT
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* with 2*num_avail_fence buffers, but alternating which half are fenced in
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* each command.
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*/
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static uint32_t
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tiled_bo_create (int fd)
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{
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uint32_t handle;
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handle = gem_create(fd, OBJECT_SIZE);
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gem_set_tiling(fd, handle, I915_TILING_X, WIDTH*4);
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return handle;
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}
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static uint32_t
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batch_create (int fd)
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{
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uint32_t buf[] = { MI_BATCH_BUFFER_END, 0 };
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uint32_t batch_handle;
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batch_handle = gem_create(fd, BATCH_SIZE);
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gem_write(fd, batch_handle, 0, buf, sizeof(buf));
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return batch_handle;
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}
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static void fill_reloc(struct drm_i915_gem_relocation_entry *reloc, uint32_t handle)
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{
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reloc->offset = 2 * sizeof(uint32_t);
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reloc->target_handle = handle;
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reloc->read_domains = I915_GEM_DOMAIN_RENDER;
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reloc->write_domain = 0;
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}
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#define BUSY_LOAD (1 << 0)
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#define INTERRUPTIBLE (1 << 1)
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static void run_test(int fd, int num_fences, int expected_errno,
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unsigned flags)
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{
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struct drm_i915_gem_execbuffer2 execbuf[2];
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struct drm_i915_gem_exec_object2 exec[2][2*MAX_FENCES+1];
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struct drm_i915_gem_relocation_entry reloc[2*MAX_FENCES];
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unsigned long count;
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int i, n;
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igt_assert(2*num_fences+1 <= ARRAY_SIZE(exec[0]));
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igt_assert(2*num_fences <= ARRAY_SIZE(reloc));
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memset(execbuf, 0, sizeof(execbuf));
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memset(exec, 0, sizeof(exec));
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memset(reloc, 0, sizeof(reloc));
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for (n = 0; n < 2*num_fences; n++) {
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uint32_t handle = tiled_bo_create(fd);
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exec[1][2*num_fences - n-1].handle = exec[0][n].handle = handle;
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fill_reloc(&reloc[n], handle);
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}
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for (i = 0; i < 2; i++) {
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for (n = 0; n < num_fences; n++)
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exec[i][n].flags = EXEC_OBJECT_NEEDS_FENCE;
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exec[i][2*num_fences].handle = batch_create(fd);
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exec[i][2*num_fences].relocs_ptr = to_user_pointer(reloc);
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exec[i][2*num_fences].relocation_count = 2*num_fences;
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execbuf[i].buffers_ptr = to_user_pointer(exec[i]);
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execbuf[i].buffer_count = 2*num_fences+1;
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execbuf[i].batch_len = 2*sizeof(uint32_t);
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}
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count = 0;
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igt_until_timeout(2) {
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for (i = 0; i < 2; i++) {
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igt_spin_t *spin = NULL;
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if (flags & BUSY_LOAD)
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spin = __igt_spin_new(fd);
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igt_while_interruptible(flags & INTERRUPTIBLE) {
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igt_assert_eq(__gem_execbuf(fd, &execbuf[i]),
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-expected_errno);
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}
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igt_spin_free(fd, spin);
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gem_quiescent_gpu(fd);
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}
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count++;
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}
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igt_info("Completed %lu cycles\n", count);
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/* Cleanup */
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for (n = 0; n < 2*num_fences; n++)
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gem_close(fd, exec[0][n].handle);
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for (i = 0; i < 2; i++)
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gem_close(fd, exec[i][2*num_fences].handle);
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}
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igt_main
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{
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uint32_t devid = 0;
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unsigned int num_fences = 0;
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int fd = -1;
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igt_skip_on_simulation();
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igt_fixture {
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fd = drm_open_driver(DRIVER_INTEL);
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igt_require_gem(fd);
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num_fences = gem_available_fences(fd);
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igt_assert(num_fences > 4);
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igt_assert(num_fences <= MAX_FENCES);
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devid = intel_get_drm_devid(fd);
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}
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igt_subtest("2-spare-fences")
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run_test(fd, num_fences - 2, 0, 0);
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for (unsigned flags = 0; flags < 4; flags++) {
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igt_subtest_f("no-spare-fences%s%s",
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flags & BUSY_LOAD ? "-busy" : "",
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flags & INTERRUPTIBLE ? "-interruptible" : "")
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run_test(fd, num_fences, 0, flags);
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}
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igt_subtest("too-many-fences")
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run_test(fd, num_fences + 1, intel_gen(devid) >= 4 ? 0 : EDEADLK, 0);
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igt_fixture
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close(fd);
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}
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