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254 lines
6.6 KiB
254 lines
6.6 KiB
/*
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* Copyright © 2009 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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*
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*/
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/** @file gem_pread_after_blit.c
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*
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* This is a test of pread's behavior when getting values out of just-drawn-to
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* buffers.
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*
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* The goal is to catch failure in the whole-buffer-flush or
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* ranged-buffer-flush paths in the kernel.
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*/
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#include "igt.h"
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/time.h>
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#include <drm.h>
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IGT_TEST_DESCRIPTION("Test pread behavior when getting values out of"
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" just-drawn-to buffers.");
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static drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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static const int width = 512, height = 512;
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static const int size = 1024 * 1024;
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#define PAGE_SIZE 4096
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static drm_intel_bo *
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create_bo(uint32_t val)
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{
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drm_intel_bo *bo;
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uint32_t *vaddr;
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int i;
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bo = drm_intel_bo_alloc(bufmgr, "src bo", size, 4096);
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/* Fill the BO with dwords starting at start_val */
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drm_intel_bo_map(bo, 1);
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vaddr = bo->virtual;
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for (i = 0; i < 1024 * 1024 / 4; i++)
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vaddr[i] = val++;
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drm_intel_bo_unmap(bo);
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return bo;
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}
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static void
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verify_large_read(drm_intel_bo *bo, uint32_t val)
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{
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uint32_t buf[size / 4];
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int i;
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drm_intel_bo_get_subdata(bo, 0, size, buf);
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for (i = 0; i < size / 4; i++) {
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igt_assert_f(buf[i] == val,
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"Unexpected value 0x%08x instead of "
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"0x%08x at offset 0x%08x (%p)\n",
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buf[i], val, i * 4, buf);
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val++;
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}
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}
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/** This reads at the size that Mesa usees for software fallbacks. */
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static void
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verify_small_read(drm_intel_bo *bo, uint32_t val)
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{
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uint32_t buf[4096 / 4];
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int offset, i;
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for (i = 0; i < 4096 / 4; i++)
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buf[i] = 0x00c0ffee;
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for (offset = 0; offset < size; offset += PAGE_SIZE) {
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drm_intel_bo_get_subdata(bo, offset, PAGE_SIZE, buf);
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for (i = 0; i < PAGE_SIZE; i += 4) {
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igt_assert_f(buf[i / 4] == val,
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"Unexpected value 0x%08x instead of "
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"0x%08x at offset 0x%08x\n",
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buf[i / 4], val, i * 4);
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val++;
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}
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}
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}
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typedef igt_hang_t (*do_hang)(int fd);
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static igt_hang_t no_hang(int fd)
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{
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return (igt_hang_t){0};
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}
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static igt_hang_t bcs_hang(int fd)
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{
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return igt_hang_ring(fd, batch->gen >= 6 ? I915_EXEC_BLT : I915_EXEC_DEFAULT);
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}
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static void do_test(int fd, int cache_level,
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drm_intel_bo *src[2],
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const uint32_t start[2],
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drm_intel_bo *tmp[2],
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int loop, do_hang do_hang_func)
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{
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igt_hang_t hang;
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if (cache_level != -1) {
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gem_set_caching(fd, tmp[0]->handle, cache_level);
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gem_set_caching(fd, tmp[1]->handle, cache_level);
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}
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do {
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/* First, do a full-buffer read after blitting */
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intel_copy_bo(batch, tmp[0], src[0], width*height*4);
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hang = do_hang_func(fd);
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verify_large_read(tmp[0], start[0]);
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igt_post_hang_ring(fd, hang);
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intel_copy_bo(batch, tmp[0], src[1], width*height*4);
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hang = do_hang_func(fd);
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verify_large_read(tmp[0], start[1]);
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igt_post_hang_ring(fd, hang);
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intel_copy_bo(batch, tmp[0], src[0], width*height*4);
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hang = do_hang_func(fd);
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verify_small_read(tmp[0], start[0]);
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igt_post_hang_ring(fd, hang);
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intel_copy_bo(batch, tmp[0], src[1], width*height*4);
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hang = do_hang_func(fd);
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verify_small_read(tmp[0], start[1]);
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igt_post_hang_ring(fd, hang);
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intel_copy_bo(batch, tmp[0], src[0], width*height*4);
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hang = do_hang_func(fd);
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verify_large_read(tmp[0], start[0]);
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igt_post_hang_ring(fd, hang);
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intel_copy_bo(batch, tmp[0], src[0], width*height*4);
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intel_copy_bo(batch, tmp[1], src[1], width*height*4);
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hang = do_hang_func(fd);
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verify_large_read(tmp[0], start[0]);
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verify_large_read(tmp[1], start[1]);
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igt_post_hang_ring(fd, hang);
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intel_copy_bo(batch, tmp[0], src[0], width*height*4);
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intel_copy_bo(batch, tmp[1], src[1], width*height*4);
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hang = do_hang_func(fd);
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verify_large_read(tmp[1], start[1]);
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verify_large_read(tmp[0], start[0]);
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igt_post_hang_ring(fd, hang);
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intel_copy_bo(batch, tmp[1], src[0], width*height*4);
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intel_copy_bo(batch, tmp[0], src[1], width*height*4);
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hang = do_hang_func(fd);
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verify_large_read(tmp[0], start[1]);
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verify_large_read(tmp[1], start[0]);
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igt_post_hang_ring(fd, hang);
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} while (--loop);
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}
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drm_intel_bo *src[2], *dst[2];
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int fd;
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igt_main
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{
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const uint32_t start[2] = {0, 1024 * 1024 / 4};
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const struct {
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const char *name;
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int cache;
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} tests[] = {
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{ "default", -1 },
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{ "uncached", 0 },
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{ "snooped", 1 },
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{ "display", 2 },
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{ NULL, -1 },
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}, *t;
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igt_skip_on_simulation();
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igt_fixture {
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fd = drm_open_driver(DRIVER_INTEL);
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igt_require_gem(fd);
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bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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src[0] = create_bo(start[0]);
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src[1] = create_bo(start[1]);
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dst[0] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096);
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dst[1] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096);
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}
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for (t = tests; t->name; t++) {
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igt_subtest_f("%s-normal", t->name)
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do_test(fd, t->cache, src, start, dst, 1, no_hang);
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igt_fork_signal_helper();
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igt_subtest_f("%s-interruptible", t->name)
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do_test(fd, t->cache, src, start, dst, 100, no_hang);
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igt_stop_signal_helper();
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igt_subtest_f("%s-hang", t->name)
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do_test(fd, t->cache, src, start, dst, 1, bcs_hang);
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}
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igt_fixture {
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drm_intel_bo_unreference(src[0]);
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drm_intel_bo_unreference(src[1]);
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drm_intel_bo_unreference(dst[0]);
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drm_intel_bo_unreference(dst[1]);
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intel_batchbuffer_free(batch);
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drm_intel_bufmgr_destroy(bufmgr);
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}
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igt_fixture
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close(fd);
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}
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