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165 lines
5.9 KiB
165 lines
5.9 KiB
//===-- xray_arm.cpp --------------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of XRay, a dynamic runtime instrumentation system.
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//
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// Implementation of ARM-specific routines (32-bit).
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//
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//===----------------------------------------------------------------------===//
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#include "sanitizer_common/sanitizer_common.h"
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#include "xray_defs.h"
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#include "xray_interface_internal.h"
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#include <atomic>
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#include <cassert>
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extern "C" void __clear_cache(void *start, void *end);
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namespace __xray {
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// The machine codes for some instructions used in runtime patching.
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enum class PatchOpcodes : uint32_t {
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PO_PushR0Lr = 0xE92D4001, // PUSH {r0, lr}
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PO_BlxIp = 0xE12FFF3C, // BLX ip
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PO_PopR0Lr = 0xE8BD4001, // POP {r0, lr}
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PO_B20 = 0xEA000005 // B #20
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};
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// 0xUUUUWXYZ -> 0x000W0XYZ
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inline static uint32_t getMovwMask(const uint32_t Value) XRAY_NEVER_INSTRUMENT {
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return (Value & 0xfff) | ((Value & 0xf000) << 4);
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}
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// 0xWXYZUUUU -> 0x000W0XYZ
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inline static uint32_t getMovtMask(const uint32_t Value) XRAY_NEVER_INSTRUMENT {
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return getMovwMask(Value >> 16);
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}
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// Writes the following instructions:
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// MOVW R<regNo>, #<lower 16 bits of the |Value|>
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// MOVT R<regNo>, #<higher 16 bits of the |Value|>
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inline static uint32_t *
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write32bitLoadReg(uint8_t regNo, uint32_t *Address,
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const uint32_t Value) XRAY_NEVER_INSTRUMENT {
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// This is a fatal error: we cannot just report it and continue execution.
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assert(regNo <= 15 && "Register number must be 0 to 15.");
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// MOVW R, #0xWXYZ in machine code is 0xE30WRXYZ
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*Address = (0xE3000000 | (uint32_t(regNo) << 12) | getMovwMask(Value));
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Address++;
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// MOVT R, #0xWXYZ in machine code is 0xE34WRXYZ
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*Address = (0xE3400000 | (uint32_t(regNo) << 12) | getMovtMask(Value));
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return Address + 1;
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}
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// Writes the following instructions:
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// MOVW r0, #<lower 16 bits of the |Value|>
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// MOVT r0, #<higher 16 bits of the |Value|>
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inline static uint32_t *
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write32bitLoadR0(uint32_t *Address,
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const uint32_t Value) XRAY_NEVER_INSTRUMENT {
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return write32bitLoadReg(0, Address, Value);
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}
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// Writes the following instructions:
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// MOVW ip, #<lower 16 bits of the |Value|>
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// MOVT ip, #<higher 16 bits of the |Value|>
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inline static uint32_t *
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write32bitLoadIP(uint32_t *Address,
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const uint32_t Value) XRAY_NEVER_INSTRUMENT {
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return write32bitLoadReg(12, Address, Value);
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}
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inline static bool patchSled(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled,
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void (*TracingHook)()) XRAY_NEVER_INSTRUMENT {
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// When |Enable| == true,
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// We replace the following compile-time stub (sled):
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//
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// xray_sled_n:
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// B #20
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// 6 NOPs (24 bytes)
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//
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// With the following runtime patch:
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//
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// xray_sled_n:
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// PUSH {r0, lr}
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// MOVW r0, #<lower 16 bits of function ID>
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// MOVT r0, #<higher 16 bits of function ID>
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// MOVW ip, #<lower 16 bits of address of TracingHook>
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// MOVT ip, #<higher 16 bits of address of TracingHook>
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// BLX ip
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// POP {r0, lr}
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//
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// Replacement of the first 4-byte instruction should be the last and atomic
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// operation, so that the user code which reaches the sled concurrently
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// either jumps over the whole sled, or executes the whole sled when the
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// latter is ready.
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//
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// When |Enable|==false, we set back the first instruction in the sled to be
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// B #20
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uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.address());
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uint32_t *CurAddress = FirstAddress + 1;
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if (Enable) {
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CurAddress =
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write32bitLoadR0(CurAddress, reinterpret_cast<uint32_t>(FuncId));
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CurAddress =
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write32bitLoadIP(CurAddress, reinterpret_cast<uint32_t>(TracingHook));
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*CurAddress = uint32_t(PatchOpcodes::PO_BlxIp);
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CurAddress++;
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*CurAddress = uint32_t(PatchOpcodes::PO_PopR0Lr);
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CurAddress++;
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std::atomic_store_explicit(
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reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress),
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uint32_t(PatchOpcodes::PO_PushR0Lr), std::memory_order_release);
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} else {
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std::atomic_store_explicit(
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reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress),
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uint32_t(PatchOpcodes::PO_B20), std::memory_order_release);
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}
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__clear_cache(reinterpret_cast<char *>(FirstAddress),
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reinterpret_cast<char *>(CurAddress));
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return true;
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}
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bool patchFunctionEntry(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled,
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void (*Trampoline)()) XRAY_NEVER_INSTRUMENT {
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return patchSled(Enable, FuncId, Sled, Trampoline);
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}
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bool patchFunctionExit(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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return patchSled(Enable, FuncId, Sled, __xray_FunctionExit);
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}
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bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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return patchSled(Enable, FuncId, Sled, __xray_FunctionTailExit);
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}
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bool patchCustomEvent(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled)
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XRAY_NEVER_INSTRUMENT { // FIXME: Implement in arm?
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return false;
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}
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bool patchTypedEvent(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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// FIXME: Implement in arm?
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return false;
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}
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// FIXME: Maybe implement this better?
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bool probeRequiredCPUFeatures() XRAY_NEVER_INSTRUMENT { return true; }
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} // namespace __xray
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extern "C" void __xray_ArgLoggerEntry() XRAY_NEVER_INSTRUMENT {
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// FIXME: this will have to be implemented in the trampoline assembly file
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}
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