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118 lines
3.8 KiB
118 lines
3.8 KiB
/*
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* Copyright (c) 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef __CLC_MATH_H_
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#define __CLC_MATH_H_
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#include "clc/clcfunc.h"
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#include "clc/as_type.h"
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#include "config.h"
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#define SNAN 0x001
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#define QNAN 0x002
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#define NINF 0x004
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#define NNOR 0x008
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#define NSUB 0x010
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#define NZER 0x020
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#define PZER 0x040
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#define PSUB 0x080
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#define PNOR 0x100
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#define PINF 0x200
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#if (defined __AMDGCN__ || defined __R600__) && !defined __HAS_FMAF__
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#define HAVE_HW_FMA32() (0)
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#elif defined CLC_SPIRV || defined CLC_SPIRV64
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bool __attribute__((noinline)) __clc_runtime_has_hw_fma32(void);
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#define HAVE_HW_FMA32() __clc_runtime_has_hw_fma32()
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#else
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#define HAVE_HW_FMA32() (1)
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#endif
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#define HAVE_BITALIGN() (0)
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#define HAVE_FAST_FMA32() (0)
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#define MATH_DIVIDE(X, Y) ((X) / (Y))
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#define MATH_RECIP(X) (1.0f / (X))
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#define MATH_SQRT(X) sqrt(X)
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#define SIGNBIT_SP32 0x80000000
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#define EXSIGNBIT_SP32 0x7fffffff
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#define EXPBITS_SP32 0x7f800000
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#define MANTBITS_SP32 0x007fffff
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#define ONEEXPBITS_SP32 0x3f800000
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#define TWOEXPBITS_SP32 0x40000000
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#define HALFEXPBITS_SP32 0x3f000000
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#define IMPBIT_SP32 0x00800000
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#define QNANBITPATT_SP32 0x7fc00000
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#define INDEFBITPATT_SP32 0xffc00000
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#define PINFBITPATT_SP32 0x7f800000
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#define NINFBITPATT_SP32 0xff800000
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#define EXPBIAS_SP32 127
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#define EXPSHIFTBITS_SP32 23
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#define BIASEDEMIN_SP32 1
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#define EMIN_SP32 -126
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#define BIASEDEMAX_SP32 254
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#define EMAX_SP32 127
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#define LAMBDA_SP32 1.0e30
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#define MANTLENGTH_SP32 24
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#define BASEDIGITS_SP32 7
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_CLC_OVERLOAD _CLC_INLINE float __clc_flush_denormal_if_not_supported(float x)
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{
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int ix = as_int(x);
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if (!__clc_fp32_subnormals_supported() &&
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((ix & EXPBITS_SP32) == 0) && ((ix & MANTBITS_SP32) != 0)) {
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ix &= SIGNBIT_SP32;
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x = as_float(ix);
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}
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return x;
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}
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#ifdef cl_khr_fp64
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#define SIGNBIT_DP64 0x8000000000000000L
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#define EXSIGNBIT_DP64 0x7fffffffffffffffL
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#define EXPBITS_DP64 0x7ff0000000000000L
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#define MANTBITS_DP64 0x000fffffffffffffL
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#define ONEEXPBITS_DP64 0x3ff0000000000000L
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#define TWOEXPBITS_DP64 0x4000000000000000L
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#define HALFEXPBITS_DP64 0x3fe0000000000000L
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#define IMPBIT_DP64 0x0010000000000000L
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#define QNANBITPATT_DP64 0x7ff8000000000000L
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#define INDEFBITPATT_DP64 0xfff8000000000000L
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#define PINFBITPATT_DP64 0x7ff0000000000000L
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#define NINFBITPATT_DP64 0xfff0000000000000L
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#define EXPBIAS_DP64 1023
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#define EXPSHIFTBITS_DP64 52
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#define BIASEDEMIN_DP64 1
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#define EMIN_DP64 -1022
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#define BIASEDEMAX_DP64 2046 /* 0x7fe */
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#define EMAX_DP64 1023 /* 0x3ff */
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#define LAMBDA_DP64 1.0e300
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#define MANTLENGTH_DP64 53
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#define BASEDIGITS_DP64 15
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#endif // cl_khr_fp64
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#define ALIGNED(x) __attribute__((aligned(x)))
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#endif // __CLC_MATH_H_
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