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<label>libc++ Info</label>
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<div id="content">
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<!--*********************************************************************-->
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<h1><atomic> design</h1>
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<!--*********************************************************************-->
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<p>
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The <tt><atomic></tt> header is one of the most closely coupled headers to
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the compiler. Ideally when you invoke any function from
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<tt><atomic></tt>, it should result in highly optimized assembly being
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inserted directly into your application ... assembly that is not otherwise
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representable by higher level C or C++ expressions. The design of the libc++
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<tt><atomic></tt> header started with this goal in mind. A secondary, but
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still very important goal is that the compiler should have to do minimal work to
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facilitate the implementation of <tt><atomic></tt>. Without this second
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goal, then practically speaking, the libc++ <tt><atomic></tt> header would
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be doomed to be a barely supported, second class citizen on almost every
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platform.
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</p>
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<p>Goals:</p>
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<blockquote><ul>
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<li>Optimal code generation for atomic operations</li>
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<li>Minimal effort for the compiler to achieve goal 1 on any given platform</li>
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<li>Conformance to the C++0X draft standard</li>
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</ul></blockquote>
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<p>
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The purpose of this document is to inform compiler writers what they need to do
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to enable a high performance libc++ <tt><atomic></tt> with minimal effort.
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</p>
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<h2>The minimal work that must be done for a conforming <tt><atomic></tt></h2>
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<p>
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The only "atomic" operations that must actually be lock free in
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<tt><atomic></tt> are represented by the following compiler intrinsics:
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</p>
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<blockquote><pre>
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__atomic_flag__
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__atomic_exchange_seq_cst(__atomic_flag__ volatile* obj, __atomic_flag__ desr)
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{
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unique_lock<mutex> _(some_mutex);
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__atomic_flag__ result = *obj;
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*obj = desr;
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return result;
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}
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void
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__atomic_store_seq_cst(__atomic_flag__ volatile* obj, __atomic_flag__ desr)
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{
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unique_lock<mutex> _(some_mutex);
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*obj = desr;
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}
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</pre></blockquote>
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<p>
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Where:
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</p>
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<blockquote><ul>
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<li>
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If <tt>__has_feature(__atomic_flag)</tt> evaluates to 1 in the preprocessor then
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the compiler must define <tt>__atomic_flag__</tt> (e.g. as a typedef to
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<tt>int</tt>).
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</li>
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<li>
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If <tt>__has_feature(__atomic_flag)</tt> evaluates to 0 in the preprocessor then
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the library defines <tt>__atomic_flag__</tt> as a typedef to <tt>bool</tt>.
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</li>
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<li>
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<p>
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To communicate that the above intrinsics are available, the compiler must
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arrange for <tt>__has_feature</tt> to return 1 when fed the intrinsic name
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appended with an '_' and the mangled type name of <tt>__atomic_flag__</tt>.
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</p>
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<p>
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For example if <tt>__atomic_flag__</tt> is <tt>unsigned int</tt>:
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</p>
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<blockquote><pre>
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__has_feature(__atomic_flag) == 1
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__has_feature(__atomic_exchange_seq_cst_j) == 1
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__has_feature(__atomic_store_seq_cst_j) == 1
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typedef unsigned int __atomic_flag__;
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unsigned int __atomic_exchange_seq_cst(unsigned int volatile*, unsigned int)
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{
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// ...
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}
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void __atomic_store_seq_cst(unsigned int volatile*, unsigned int)
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{
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// ...
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}
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</pre></blockquote>
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</li>
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</ul></blockquote>
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<p>
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That's it! Compiler writers do the above and you've got a fully conforming
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(though sub-par performance) <tt><atomic></tt> header!
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</p>
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<h2>Recommended work for a higher performance <tt><atomic></tt></h2>
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<p>
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It would be good if the above intrinsics worked with all integral types plus
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<tt>void*</tt>. Because this may not be possible to do in a lock-free manner for
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all integral types on all platforms, a compiler must communicate each type that
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an intrinsic works with. For example if <tt>__atomic_exchange_seq_cst</tt> works
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for all types except for <tt>long long</tt> and <tt>unsigned long long</tt>
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then:
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</p>
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<blockquote><pre>
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__has_feature(__atomic_exchange_seq_cst_b) == 1 // bool
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__has_feature(__atomic_exchange_seq_cst_c) == 1 // char
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__has_feature(__atomic_exchange_seq_cst_a) == 1 // signed char
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__has_feature(__atomic_exchange_seq_cst_h) == 1 // unsigned char
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__has_feature(__atomic_exchange_seq_cst_Ds) == 1 // char16_t
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__has_feature(__atomic_exchange_seq_cst_Di) == 1 // char32_t
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__has_feature(__atomic_exchange_seq_cst_w) == 1 // wchar_t
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__has_feature(__atomic_exchange_seq_cst_s) == 1 // short
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__has_feature(__atomic_exchange_seq_cst_t) == 1 // unsigned short
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__has_feature(__atomic_exchange_seq_cst_i) == 1 // int
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__has_feature(__atomic_exchange_seq_cst_j) == 1 // unsigned int
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__has_feature(__atomic_exchange_seq_cst_l) == 1 // long
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__has_feature(__atomic_exchange_seq_cst_m) == 1 // unsigned long
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__has_feature(__atomic_exchange_seq_cst_Pv) == 1 // void*
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</pre></blockquote>
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<p>
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Note that only the <tt>__has_feature</tt> flag is decorated with the argument
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type. The name of the compiler intrinsic is not decorated, but instead works
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like a C++ overloaded function.
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</p>
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<p>
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Additionally there are other intrinsics besides
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<tt>__atomic_exchange_seq_cst</tt> and <tt>__atomic_store_seq_cst</tt>. They
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are optional. But if the compiler can generate faster code than provided by the
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library, then clients will benefit from the compiler writer's expertise and
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knowledge of the targeted platform.
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</p>
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<p>
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Below is the complete list of <i>sequentially consistent</i> intrinsics, and
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their library implementations. Template syntax is used to indicate the desired
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overloading for integral and void* types. The template does not represent a
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requirement that the intrinsic operate on <em>any</em> type!
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</p>
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<blockquote><pre>
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T is one of: bool, char, signed char, unsigned char, short, unsigned short,
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int, unsigned int, long, unsigned long,
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long long, unsigned long long, char16_t, char32_t, wchar_t, void*
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template <class T>
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T
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__atomic_load_seq_cst(T const volatile* obj)
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{
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unique_lock<mutex> _(some_mutex);
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return *obj;
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}
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template <class T>
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void
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__atomic_store_seq_cst(T volatile* obj, T desr)
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{
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unique_lock<mutex> _(some_mutex);
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*obj = desr;
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}
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template <class T>
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T
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__atomic_exchange_seq_cst(T volatile* obj, T desr)
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{
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unique_lock<mutex> _(some_mutex);
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T r = *obj;
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*obj = desr;
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return r;
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}
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template <class T>
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bool
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__atomic_compare_exchange_strong_seq_cst_seq_cst(T volatile* obj, T* exp, T desr)
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{
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unique_lock<mutex> _(some_mutex);
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if (std::memcmp(const_cast<T*>(obj), exp, sizeof(T)) == 0)
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{
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std::memcpy(const_cast<T*>(obj), &desr, sizeof(T));
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return true;
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}
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std::memcpy(exp, const_cast<T*>(obj), sizeof(T));
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return false;
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}
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template <class T>
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bool
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__atomic_compare_exchange_weak_seq_cst_seq_cst(T volatile* obj, T* exp, T desr)
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{
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unique_lock<mutex> _(some_mutex);
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if (std::memcmp(const_cast<T*>(obj), exp, sizeof(T)) == 0)
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{
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std::memcpy(const_cast<T*>(obj), &desr, sizeof(T));
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return true;
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}
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std::memcpy(exp, const_cast<T*>(obj), sizeof(T));
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return false;
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}
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T is one of: char, signed char, unsigned char, short, unsigned short,
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int, unsigned int, long, unsigned long,
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long long, unsigned long long, char16_t, char32_t, wchar_t
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template <class T>
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T
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__atomic_fetch_add_seq_cst(T volatile* obj, T operand)
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{
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unique_lock<mutex> _(some_mutex);
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T r = *obj;
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*obj += operand;
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return r;
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}
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template <class T>
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T
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__atomic_fetch_sub_seq_cst(T volatile* obj, T operand)
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{
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unique_lock<mutex> _(some_mutex);
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T r = *obj;
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*obj -= operand;
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return r;
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}
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template <class T>
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T
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__atomic_fetch_and_seq_cst(T volatile* obj, T operand)
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{
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unique_lock<mutex> _(some_mutex);
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T r = *obj;
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*obj &= operand;
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return r;
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}
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template <class T>
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T
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__atomic_fetch_or_seq_cst(T volatile* obj, T operand)
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{
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unique_lock<mutex> _(some_mutex);
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T r = *obj;
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*obj |= operand;
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return r;
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}
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template <class T>
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T
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__atomic_fetch_xor_seq_cst(T volatile* obj, T operand)
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{
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unique_lock<mutex> _(some_mutex);
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T r = *obj;
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*obj ^= operand;
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return r;
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}
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void*
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__atomic_fetch_add_seq_cst(void* volatile* obj, ptrdiff_t operand)
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{
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unique_lock<mutex> _(some_mutex);
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void* r = *obj;
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(char*&)(*obj) += operand;
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return r;
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}
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void*
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__atomic_fetch_sub_seq_cst(void* volatile* obj, ptrdiff_t operand)
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{
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unique_lock<mutex> _(some_mutex);
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void* r = *obj;
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(char*&)(*obj) -= operand;
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return r;
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}
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void __atomic_thread_fence_seq_cst()
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{
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unique_lock<mutex> _(some_mutex);
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}
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void __atomic_signal_fence_seq_cst()
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{
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unique_lock<mutex> _(some_mutex);
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}
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</pre></blockquote>
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<p>
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One should consult the (currently draft)
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<a href="https://wg21.link/n3126">C++ standard</a>
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for the details of the definitions for these operations. For example
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<tt>__atomic_compare_exchange_weak_seq_cst_seq_cst</tt> is allowed to fail
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spuriously while <tt>__atomic_compare_exchange_strong_seq_cst_seq_cst</tt> is
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not.
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</p>
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<p>
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If on your platform the lock-free definition of
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<tt>__atomic_compare_exchange_weak_seq_cst_seq_cst</tt> would be the same as
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<tt>__atomic_compare_exchange_strong_seq_cst_seq_cst</tt>, you may omit the
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<tt>__atomic_compare_exchange_weak_seq_cst_seq_cst</tt> intrinsic without a
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performance cost. The library will prefer your implementation of
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<tt>__atomic_compare_exchange_strong_seq_cst_seq_cst</tt> over its own
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definition for implementing
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<tt>__atomic_compare_exchange_weak_seq_cst_seq_cst</tt>. That is, the library
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will arrange for <tt>__atomic_compare_exchange_weak_seq_cst_seq_cst</tt> to call
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<tt>__atomic_compare_exchange_strong_seq_cst_seq_cst</tt> if you supply an
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intrinsic for the strong version but not the weak.
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</p>
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<h2>Taking advantage of weaker memory synchronization</h2>
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<p>
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So far all of the intrinsics presented require a <em>sequentially
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consistent</em> memory ordering. That is, no loads or stores can move across
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the operation (just as if the library had locked that internal mutex). But
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<tt><atomic></tt> supports weaker memory ordering operations. In all,
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there are six memory orderings (listed here from strongest to weakest):
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</p>
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<blockquote><pre>
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memory_order_seq_cst
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memory_order_acq_rel
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memory_order_release
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memory_order_acquire
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memory_order_consume
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memory_order_relaxed
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</pre></blockquote>
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<p>
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(See the
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<a href="https://wg21.link/n3126">C++ standard</a>
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for the detailed definitions of each of these orderings).
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</p>
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<p>
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On some platforms, the compiler vendor can offer some or even all of the above
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intrinsics at one or more weaker levels of memory synchronization. This might
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lead for example to not issuing an <tt>mfence</tt> instruction on the x86.
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</p>
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<p>
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If the compiler does not offer any given operation, at any given memory ordering
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level, the library will automatically attempt to call the next highest memory
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ordering operation. This continues up to <tt>seq_cst</tt>, and if that doesn't
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exist, then the library takes over and does the job with a <tt>mutex</tt>. This
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is a compile-time search & selection operation. At run time, the
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application will only see the few inlined assembly instructions for the selected
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intrinsic.
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</p>
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<p>
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Each intrinsic is appended with the 7-letter name of the memory ordering it
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addresses. For example a <tt>load</tt> with <tt>relaxed</tt> ordering is
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defined by:
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</p>
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<blockquote><pre>
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T __atomic_load_relaxed(const volatile T* obj);
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</pre></blockquote>
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<p>
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And announced with:
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</p>
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<blockquote><pre>
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__has_feature(__atomic_load_relaxed_b) == 1 // bool
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__has_feature(__atomic_load_relaxed_c) == 1 // char
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__has_feature(__atomic_load_relaxed_a) == 1 // signed char
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...
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</pre></blockquote>
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<p>
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The <tt>__atomic_compare_exchange_strong(weak)</tt> intrinsics are parameterized
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on two memory orderings. The first ordering applies when the operation returns
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<tt>true</tt> and the second ordering applies when the operation returns
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<tt>false</tt>.
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</p>
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<p>
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Not every memory ordering is appropriate for every operation. <tt>exchange</tt>
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and the <tt>fetch_<i>op</i></tt> operations support all 6. But <tt>load</tt>
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only supports <tt>relaxed</tt>, <tt>consume</tt>, <tt>acquire</tt> and <tt>seq_cst</tt>.
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<tt>store</tt>
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only supports <tt>relaxed</tt>, <tt>release</tt>, and <tt>seq_cst</tt>. The
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<tt>compare_exchange</tt> operations support the following 16 combinations out
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of the possible 36:
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</p>
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<blockquote><pre>
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relaxed_relaxed
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consume_relaxed
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consume_consume
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acquire_relaxed
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acquire_consume
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acquire_acquire
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release_relaxed
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release_consume
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release_acquire
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acq_rel_relaxed
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acq_rel_consume
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acq_rel_acquire
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seq_cst_relaxed
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seq_cst_consume
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seq_cst_acquire
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seq_cst_seq_cst
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</pre></blockquote>
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<p>
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Again, the compiler supplies intrinsics only for the strongest orderings where
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it can make a difference. The library takes care of calling the weakest
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supplied intrinsic that is as strong or stronger than the customer asked for.
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</p>
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</div>
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</body>
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</html>
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