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1657 lines
90 KiB
1657 lines
90 KiB
// Copyright 2016, VIXL authors
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// * Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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// * Neither the name of ARM Limited nor the names of its contributors may be
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// used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
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// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// -----------------------------------------------------------------------------
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// This file is auto generated from the
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// test/aarch32/config/template-simulator-aarch32.cc.in template file using
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// tools/generate_tests.py.
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//
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// PLEASE DO NOT EDIT.
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// -----------------------------------------------------------------------------
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#include "test-runner.h"
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#include "test-utils.h"
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#include "test-utils-aarch32.h"
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#include "aarch32/assembler-aarch32.h"
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#include "aarch32/disasm-aarch32.h"
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#include "aarch32/macro-assembler-aarch32.h"
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#define __ masm.
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#define BUF_SIZE (4096)
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#ifdef VIXL_INCLUDE_SIMULATOR_AARCH32
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// Run tests with the simulator.
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#define SETUP() MacroAssembler masm(BUF_SIZE)
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#define START() masm.GetBuffer()->Reset()
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#define END() \
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__ Hlt(0); \
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__ FinalizeCode();
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// TODO: Run the tests in the simulator.
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#define RUN()
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#else // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32.
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#define SETUP() \
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MacroAssembler masm(BUF_SIZE); \
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UseScratchRegisterScope harness_scratch;
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#define START() \
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harness_scratch.Open(&masm); \
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harness_scratch.ExcludeAll(); \
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masm.GetBuffer()->Reset(); \
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__ Push(r4); \
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__ Push(r5); \
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__ Push(r6); \
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__ Push(r7); \
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__ Push(r8); \
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__ Push(r9); \
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__ Push(r10); \
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__ Push(r11); \
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__ Push(lr); \
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harness_scratch.Include(ip);
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#define END() \
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harness_scratch.Exclude(ip); \
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__ Pop(lr); \
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__ Pop(r11); \
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__ Pop(r10); \
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__ Pop(r9); \
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__ Pop(r8); \
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__ Pop(r7); \
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__ Pop(r6); \
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__ Pop(r5); \
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__ Pop(r4); \
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__ Bx(lr); \
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__ FinalizeCode(); \
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harness_scratch.Close();
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#define RUN() \
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{ \
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int pcs_offset = masm.IsUsingT32() ? 1 : 0; \
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masm.GetBuffer()->SetExecutable(); \
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ExecuteMemory(masm.GetBuffer()->GetStartAddress<byte*>(), \
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masm.GetSizeOfCodeGenerated(), \
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pcs_offset); \
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masm.GetBuffer()->SetWritable(); \
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}
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#endif // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32
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namespace vixl {
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namespace aarch32 {
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// List of instruction encodings:
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#define FOREACH_INSTRUCTION(M) \
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M(Adc) \
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M(Adcs) \
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M(Add) \
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M(Adds) \
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M(And) \
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M(Ands) \
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M(Bic) \
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M(Bics) \
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M(Eor) \
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M(Eors) \
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M(Orn) \
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M(Orns) \
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M(Orr) \
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M(Orrs) \
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M(Rsb) \
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M(Rsbs) \
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M(Sbc) \
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M(Sbcs) \
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M(Sub) \
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M(Subs)
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// The following definitions are defined again in each generated test, therefore
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// we need to place them in an anomymous namespace. It expresses that they are
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// local to this file only, and the compiler is not allowed to share these types
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// across test files during template instantiation. Specifically, `Operands` and
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// `Inputs` have various layouts across generated tests so they absolutely
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// cannot be shared.
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#ifdef VIXL_INCLUDE_TARGET_T32
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namespace {
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// Values to be passed to the assembler to produce the instruction under test.
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struct Operands {
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Condition cond;
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Register rd;
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Register rn;
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Register rm;
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ShiftType shift;
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uint32_t amount;
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};
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// Input data to feed to the instruction.
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struct Inputs {
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uint32_t apsr;
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uint32_t rd;
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uint32_t rn;
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uint32_t rm;
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};
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// This structure contains all input data needed to test one specific encoding.
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// It used to generate a loop over an instruction.
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struct TestLoopData {
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// The `operands` fields represents the values to pass to the assembler to
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// produce the instruction.
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Operands operands;
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// Description of the operands, used for error reporting.
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const char* operands_description;
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// Unique identifier, used for generating traces.
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const char* identifier;
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// Array of values to be fed to the instruction.
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size_t input_size;
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const Inputs* inputs;
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};
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static const Inputs kCondition[] =
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{{NFlag, 0xabababab, 0xabababab, 0xabababab},
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{ZFlag, 0xabababab, 0xabababab, 0xabababab},
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{CFlag, 0xabababab, 0xabababab, 0xabababab},
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{VFlag, 0xabababab, 0xabababab, 0xabababab},
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{NZFlag, 0xabababab, 0xabababab, 0xabababab},
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{NCFlag, 0xabababab, 0xabababab, 0xabababab},
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{NVFlag, 0xabababab, 0xabababab, 0xabababab},
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{ZCFlag, 0xabababab, 0xabababab, 0xabababab},
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{ZVFlag, 0xabababab, 0xabababab, 0xabababab},
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{CVFlag, 0xabababab, 0xabababab, 0xabababab},
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{NZCFlag, 0xabababab, 0xabababab, 0xabababab},
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{NZVFlag, 0xabababab, 0xabababab, 0xabababab},
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{NCVFlag, 0xabababab, 0xabababab, 0xabababab},
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{ZCVFlag, 0xabababab, 0xabababab, 0xabababab},
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{NZCVFlag, 0xabababab, 0xabababab, 0xabababab}};
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static const Inputs kRdIsRn[] = {{NoFlag, 0xffffff83, 0xffffff83, 0xffff8002},
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{NoFlag, 0x0000007e, 0x0000007e, 0x7fffffff},
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{NoFlag, 0x0000007d, 0x0000007d, 0xffffffe0},
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{NoFlag, 0x7fffffff, 0x7fffffff, 0x00000002},
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{NoFlag, 0xffff8002, 0xffff8002, 0xfffffffd},
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{NoFlag, 0xffffffe0, 0xffffffe0, 0x00007fff},
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{NoFlag, 0xffff8000, 0xffff8000, 0xffffff83},
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{NoFlag, 0xffff8002, 0xffff8002, 0x80000001},
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{NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8003},
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{NoFlag, 0x00007fff, 0x00007fff, 0xffffffff},
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{NoFlag, 0x00000000, 0x00000000, 0xffffff80},
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{NoFlag, 0xffff8001, 0xffff8001, 0x33333333},
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{NoFlag, 0xffffff80, 0xffffff80, 0x0000007e},
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{NoFlag, 0x0000007e, 0x0000007e, 0x7ffffffd},
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{NoFlag, 0xffffff80, 0xffffff80, 0xfffffffd},
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{NoFlag, 0x00000020, 0x00000020, 0xffff8002},
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{NoFlag, 0xffffff80, 0xffffff80, 0xfffffffe},
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{NoFlag, 0x00000002, 0x00000002, 0x00000000},
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{NoFlag, 0x0000007e, 0x0000007e, 0x00000001},
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{NoFlag, 0x00000002, 0x00000002, 0x0000007f},
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{NoFlag, 0x80000000, 0x80000000, 0x80000000},
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{NoFlag, 0x7fffffff, 0x7fffffff, 0xffffff80},
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{NoFlag, 0x00000001, 0x00000001, 0xfffffffe},
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{NoFlag, 0x33333333, 0x33333333, 0x0000007d},
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{NoFlag, 0x00000001, 0x00000001, 0x7ffffffe},
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{NoFlag, 0x00007ffe, 0x00007ffe, 0x7fffffff},
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{NoFlag, 0x80000000, 0x80000000, 0xffffff83},
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{NoFlag, 0x00000000, 0x00000000, 0x7ffffffe},
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{NoFlag, 0x00000000, 0x00000000, 0x0000007f},
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{NoFlag, 0x7fffffff, 0x7fffffff, 0xcccccccc},
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{NoFlag, 0xffffff82, 0xffffff82, 0x00000002},
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{NoFlag, 0x7ffffffd, 0x7ffffffd, 0xaaaaaaaa},
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{NoFlag, 0xcccccccc, 0xcccccccc, 0xffff8001},
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{NoFlag, 0xfffffffe, 0xfffffffe, 0xffff8001},
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{NoFlag, 0x7fffffff, 0x7fffffff, 0x00000020},
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{NoFlag, 0xffffffe0, 0xffffffe0, 0x00007ffe},
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{NoFlag, 0x80000001, 0x80000001, 0xffff8000},
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{NoFlag, 0xffffff82, 0xffffff82, 0x0000007d},
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{NoFlag, 0x0000007e, 0x0000007e, 0x7ffffffe},
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{NoFlag, 0x00007ffd, 0x00007ffd, 0xffffff80},
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{NoFlag, 0x0000007d, 0x0000007d, 0x0000007e},
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{NoFlag, 0xffff8002, 0xffff8002, 0x7fffffff},
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{NoFlag, 0xffffffe0, 0xffffffe0, 0x0000007f},
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{NoFlag, 0x00007ffe, 0x00007ffe, 0xffffff81},
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{NoFlag, 0x80000000, 0x80000000, 0x0000007e},
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{NoFlag, 0xffffffff, 0xffffffff, 0xaaaaaaaa},
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{NoFlag, 0xfffffffe, 0xfffffffe, 0x00000020},
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{NoFlag, 0xffffff82, 0xffffff82, 0xffff8003},
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{NoFlag, 0x7ffffffd, 0x7ffffffd, 0xffff8002},
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{NoFlag, 0x7ffffffe, 0x7ffffffe, 0x00000000},
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{NoFlag, 0xfffffffd, 0xfffffffd, 0xffffffe0},
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{NoFlag, 0xffff8000, 0xffff8000, 0xffff8002},
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{NoFlag, 0xffffff82, 0xffffff82, 0x7ffffffd},
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{NoFlag, 0xcccccccc, 0xcccccccc, 0x80000000},
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{NoFlag, 0x80000001, 0x80000001, 0x33333333},
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{NoFlag, 0x00000001, 0x00000001, 0x00000002},
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{NoFlag, 0x55555555, 0x55555555, 0x0000007f},
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{NoFlag, 0xffffffff, 0xffffffff, 0xfffffffd},
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{NoFlag, 0xffffff80, 0xffffff80, 0x80000000},
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{NoFlag, 0x00000000, 0x00000000, 0x00000020},
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{NoFlag, 0xfffffffe, 0xfffffffe, 0xffff8003},
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{NoFlag, 0xffff8001, 0xffff8001, 0xffff8000},
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{NoFlag, 0x55555555, 0x55555555, 0x55555555},
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{NoFlag, 0x00007fff, 0x00007fff, 0xffff8000},
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{NoFlag, 0x7fffffff, 0x7fffffff, 0xffffffe0},
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{NoFlag, 0x00000001, 0x00000001, 0x55555555},
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{NoFlag, 0x33333333, 0x33333333, 0x7ffffffe},
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{NoFlag, 0x80000000, 0x80000000, 0xffffffe0},
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{NoFlag, 0xffffff83, 0xffffff83, 0x0000007d},
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{NoFlag, 0xffff8003, 0xffff8003, 0x00000002},
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{NoFlag, 0x7ffffffe, 0x7ffffffe, 0xffffff81},
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{NoFlag, 0xfffffffe, 0xfffffffe, 0xffffff80},
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{NoFlag, 0x00007ffe, 0x00007ffe, 0xffff8002},
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{NoFlag, 0x80000001, 0x80000001, 0xfffffffe},
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{NoFlag, 0x7ffffffd, 0x7ffffffd, 0xfffffffd},
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{NoFlag, 0x7ffffffd, 0x7ffffffd, 0xfffffffe},
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{NoFlag, 0x7ffffffe, 0x7ffffffe, 0xffffff83},
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{NoFlag, 0xfffffffd, 0xfffffffd, 0x00007ffe},
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{NoFlag, 0x7fffffff, 0x7fffffff, 0x80000000},
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{NoFlag, 0xffffff82, 0xffffff82, 0x7fffffff},
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{NoFlag, 0xffffffe0, 0xffffffe0, 0xffffff83},
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{NoFlag, 0xffff8000, 0xffff8000, 0xffff8000},
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{NoFlag, 0x00000001, 0x00000001, 0x7fffffff},
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{NoFlag, 0xfffffffe, 0xfffffffe, 0xffffffff},
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{NoFlag, 0xffffff82, 0xffffff82, 0xffffffff},
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{NoFlag, 0xffffffff, 0xffffffff, 0xfffffffe},
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{NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0x0000007d},
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{NoFlag, 0xffff8001, 0xffff8001, 0xfffffffe},
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{NoFlag, 0x00007ffe, 0x00007ffe, 0x0000007d},
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{NoFlag, 0xffffff82, 0xffffff82, 0xfffffffe},
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{NoFlag, 0x00000000, 0x00000000, 0x00007ffd},
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{NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0xffff8002},
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{NoFlag, 0x0000007f, 0x0000007f, 0xffffff82},
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{NoFlag, 0x00007fff, 0x00007fff, 0x33333333},
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{NoFlag, 0xfffffffd, 0xfffffffd, 0x80000000},
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{NoFlag, 0x00000000, 0x00000000, 0xfffffffd},
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{NoFlag, 0x0000007d, 0x0000007d, 0x0000007f},
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{NoFlag, 0xfffffffd, 0xfffffffd, 0x0000007e},
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{NoFlag, 0xffffffe0, 0xffffffe0, 0x55555555},
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{NoFlag, 0xffffffff, 0xffffffff, 0x80000000},
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{NoFlag, 0xffffffe0, 0xffffffe0, 0x0000007e},
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{NoFlag, 0xffffff81, 0xffffff81, 0x00007ffd},
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{NoFlag, 0x00000020, 0x00000020, 0xffff8001},
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{NoFlag, 0x00007fff, 0x00007fff, 0xffffff83},
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{NoFlag, 0x33333333, 0x33333333, 0x00000000},
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{NoFlag, 0xffff8000, 0xffff8000, 0xffffff82},
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{NoFlag, 0xffff8001, 0xffff8001, 0x0000007e},
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{NoFlag, 0xffffff80, 0xffffff80, 0x00000001},
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{NoFlag, 0x80000000, 0x80000000, 0xcccccccc},
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{NoFlag, 0x00000002, 0x00000002, 0x00007ffd},
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{NoFlag, 0x7ffffffe, 0x7ffffffe, 0x80000001},
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{NoFlag, 0x00000020, 0x00000020, 0x00007ffe},
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{NoFlag, 0xffff8000, 0xffff8000, 0xfffffffd},
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{NoFlag, 0x7fffffff, 0x7fffffff, 0xffff8001},
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{NoFlag, 0x00000000, 0x00000000, 0xffffff83},
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{NoFlag, 0x0000007f, 0x0000007f, 0x00000020},
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{NoFlag, 0x80000001, 0x80000001, 0xffff8003},
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{NoFlag, 0xffff8001, 0xffff8001, 0x0000007f},
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{NoFlag, 0x0000007f, 0x0000007f, 0x80000001},
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{NoFlag, 0x00000002, 0x00000002, 0x7ffffffe},
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{NoFlag, 0xffffff82, 0xffffff82, 0xffffff83},
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{NoFlag, 0x00007ffd, 0x00007ffd, 0x7fffffff},
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{NoFlag, 0x7ffffffe, 0x7ffffffe, 0xfffffffe},
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{NoFlag, 0xffffff82, 0xffffff82, 0xffff8000},
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{NoFlag, 0xfffffffe, 0xfffffffe, 0xffff8000},
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{NoFlag, 0xffff8002, 0xffff8002, 0xffffff81},
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{NoFlag, 0x33333333, 0x33333333, 0x7fffffff},
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{NoFlag, 0x80000001, 0x80000001, 0x00007fff},
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{NoFlag, 0xffff8002, 0xffff8002, 0xcccccccc},
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{NoFlag, 0xffffffff, 0xffffffff, 0x00000002},
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{NoFlag, 0x33333333, 0x33333333, 0xffffff81},
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{NoFlag, 0xfffffffd, 0xfffffffd, 0xffffff80},
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{NoFlag, 0x55555555, 0x55555555, 0xaaaaaaaa},
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{NoFlag, 0x33333333, 0x33333333, 0xffffff82},
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{NoFlag, 0xffffff80, 0xffffff80, 0xaaaaaaaa},
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{NoFlag, 0x0000007e, 0x0000007e, 0x00000020},
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{NoFlag, 0xffffff83, 0xffffff83, 0x00007ffd},
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{NoFlag, 0xffffff82, 0xffffff82, 0xaaaaaaaa},
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{NoFlag, 0xffff8003, 0xffff8003, 0xffffffff},
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{NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0xfffffffe},
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{NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0x00000000},
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{NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0x0000007f},
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{NoFlag, 0x0000007f, 0x0000007f, 0x0000007d},
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{NoFlag, 0xfffffffd, 0xfffffffd, 0x55555555},
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{NoFlag, 0xffffffff, 0xffffffff, 0x00000020},
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{NoFlag, 0x00007ffe, 0x00007ffe, 0xffffff83},
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{NoFlag, 0x7fffffff, 0x7fffffff, 0x55555555},
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{NoFlag, 0x55555555, 0x55555555, 0xcccccccc},
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{NoFlag, 0xffffffe0, 0xffffffe0, 0xffff8003},
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{NoFlag, 0x7ffffffe, 0x7ffffffe, 0x00007ffe},
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{NoFlag, 0x00007ffd, 0x00007ffd, 0xffff8002},
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{NoFlag, 0x00007ffd, 0x00007ffd, 0x00000001},
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{NoFlag, 0x00000000, 0x00000000, 0x00007ffe},
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{NoFlag, 0xffffff80, 0xffffff80, 0x00000020},
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{NoFlag, 0xffff8000, 0xffff8000, 0x0000007d},
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{NoFlag, 0xffff8003, 0xffff8003, 0x00000000},
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{NoFlag, 0x0000007e, 0x0000007e, 0x80000000},
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{NoFlag, 0xfffffffd, 0xfffffffd, 0x00000000},
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{NoFlag, 0xffffff80, 0xffffff80, 0xffffffff},
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{NoFlag, 0xcccccccc, 0xcccccccc, 0x0000007f},
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{NoFlag, 0x7ffffffd, 0x7ffffffd, 0x00000000},
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{NoFlag, 0x00007fff, 0x00007fff, 0x00000000},
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{NoFlag, 0x0000007f, 0x0000007f, 0x00000001},
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{NoFlag, 0xffffffff, 0xffffffff, 0xffffff82},
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{NoFlag, 0x00007ffe, 0x00007ffe, 0x00007ffd},
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{NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0x33333333},
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{NoFlag, 0xffffff82, 0xffffff82, 0x55555555},
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{NoFlag, 0xffff8003, 0xffff8003, 0x0000007e},
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{NoFlag, 0xffffff83, 0xffffff83, 0x00000002},
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{NoFlag, 0xffffff82, 0xffffff82, 0x33333333},
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{NoFlag, 0x55555555, 0x55555555, 0xffffffff},
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{NoFlag, 0xaaaaaaaa, 0xaaaaaaaa, 0x80000001},
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{NoFlag, 0xffffff83, 0xffffff83, 0xffffffe0},
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{NoFlag, 0x00000001, 0x00000001, 0xffffffe0},
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{NoFlag, 0x33333333, 0x33333333, 0x33333333},
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{NoFlag, 0x55555555, 0x55555555, 0x00000001},
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{NoFlag, 0xffffff83, 0xffffff83, 0x00007fff},
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{NoFlag, 0x00000002, 0x00000002, 0xfffffffd},
|
|
{NoFlag, 0xffffffe0, 0xffffffe0, 0xffff8002},
|
|
{NoFlag, 0x80000000, 0x80000000, 0x00007ffd},
|
|
{NoFlag, 0xffffff83, 0xffffff83, 0xfffffffe},
|
|
{NoFlag, 0x80000001, 0x80000001, 0xffffffff},
|
|
{NoFlag, 0xffff8003, 0xffff8003, 0x00000020},
|
|
{NoFlag, 0xffffff82, 0xffffff82, 0xcccccccc},
|
|
{NoFlag, 0x00000020, 0x00000020, 0x7fffffff},
|
|
{NoFlag, 0xffffff80, 0xffffff80, 0x55555555},
|
|
{NoFlag, 0x00000001, 0x00000001, 0x00000020},
|
|
{NoFlag, 0xffff8001, 0xffff8001, 0x00007fff},
|
|
{NoFlag, 0x00000020, 0x00000020, 0xaaaaaaaa},
|
|
{NoFlag, 0x55555555, 0x55555555, 0x7fffffff},
|
|
{NoFlag, 0xfffffffe, 0xfffffffe, 0x7fffffff},
|
|
{NoFlag, 0x00007fff, 0x00007fff, 0x55555555},
|
|
{NoFlag, 0x55555555, 0x55555555, 0x0000007d},
|
|
{NoFlag, 0xcccccccc, 0xcccccccc, 0x7ffffffe},
|
|
{NoFlag, 0xffff8002, 0xffff8002, 0x00007ffe},
|
|
{NoFlag, 0xfffffffe, 0xfffffffe, 0xffffff81},
|
|
{NoFlag, 0xffffff81, 0xffffff81, 0x0000007d},
|
|
{NoFlag, 0x00000020, 0x00000020, 0x0000007e},
|
|
{NoFlag, 0xffffffff, 0xffffffff, 0x00007ffe},
|
|
{NoFlag, 0xffff8002, 0xffff8002, 0x0000007e}};
|
|
|
|
static const Inputs kRdIsRm[] = {{NoFlag, 0x55555555, 0x7ffffffe, 0x55555555},
|
|
{NoFlag, 0xfffffffe, 0x00000001, 0xfffffffe},
|
|
{NoFlag, 0xffffff82, 0xffffff82, 0xffffff82},
|
|
{NoFlag, 0xffff8000, 0xffff8003, 0xffff8000},
|
|
{NoFlag, 0x00000001, 0x00000000, 0x00000001},
|
|
{NoFlag, 0xffffff81, 0x00007fff, 0xffffff81},
|
|
{NoFlag, 0x0000007d, 0xffff8002, 0x0000007d},
|
|
{NoFlag, 0x80000000, 0xffff8000, 0x80000000},
|
|
{NoFlag, 0xffffff80, 0x00000020, 0xffffff80},
|
|
{NoFlag, 0x55555555, 0xffffff81, 0x55555555},
|
|
{NoFlag, 0x00007ffd, 0xffffff82, 0x00007ffd},
|
|
{NoFlag, 0x55555555, 0x00007fff, 0x55555555},
|
|
{NoFlag, 0x7ffffffd, 0xffff8000, 0x7ffffffd},
|
|
{NoFlag, 0xffffffff, 0xffffff83, 0xffffffff},
|
|
{NoFlag, 0x00000000, 0xffffffff, 0x00000000},
|
|
{NoFlag, 0xffff8002, 0x33333333, 0xffff8002},
|
|
{NoFlag, 0x00007ffd, 0xaaaaaaaa, 0x00007ffd},
|
|
{NoFlag, 0x55555555, 0xffff8000, 0x55555555},
|
|
{NoFlag, 0x80000001, 0xffffffff, 0x80000001},
|
|
{NoFlag, 0x0000007d, 0xffffff83, 0x0000007d},
|
|
{NoFlag, 0x0000007e, 0xffffff82, 0x0000007e},
|
|
{NoFlag, 0xcccccccc, 0x0000007d, 0xcccccccc},
|
|
{NoFlag, 0xffff8002, 0xffffffff, 0xffff8002},
|
|
{NoFlag, 0xffffff81, 0x0000007f, 0xffffff81},
|
|
{NoFlag, 0xffff8000, 0xffffff83, 0xffff8000},
|
|
{NoFlag, 0xffffffff, 0xffffffe0, 0xffffffff},
|
|
{NoFlag, 0xfffffffd, 0x80000001, 0xfffffffd},
|
|
{NoFlag, 0x55555555, 0x80000000, 0x55555555},
|
|
{NoFlag, 0xffff8000, 0x0000007d, 0xffff8000},
|
|
{NoFlag, 0xaaaaaaaa, 0xffff8003, 0xaaaaaaaa},
|
|
{NoFlag, 0x00000001, 0x00007ffd, 0x00000001},
|
|
{NoFlag, 0x0000007e, 0x7ffffffe, 0x0000007e},
|
|
{NoFlag, 0x00000020, 0x00007ffd, 0x00000020},
|
|
{NoFlag, 0xffffff81, 0x7ffffffd, 0xffffff81},
|
|
{NoFlag, 0xffffff83, 0x0000007f, 0xffffff83},
|
|
{NoFlag, 0x00000001, 0x0000007e, 0x00000001},
|
|
{NoFlag, 0xffffff82, 0xfffffffd, 0xffffff82},
|
|
{NoFlag, 0xffff8003, 0x7ffffffe, 0xffff8003},
|
|
{NoFlag, 0x00000002, 0x00000002, 0x00000002},
|
|
{NoFlag, 0xffffff83, 0xffff8001, 0xffffff83},
|
|
{NoFlag, 0xffff8002, 0xfffffffe, 0xffff8002},
|
|
{NoFlag, 0xffffff80, 0xffffff81, 0xffffff80},
|
|
{NoFlag, 0x7fffffff, 0xffffff81, 0x7fffffff},
|
|
{NoFlag, 0x00000020, 0xffffff81, 0x00000020},
|
|
{NoFlag, 0x0000007f, 0xffffffff, 0x0000007f},
|
|
{NoFlag, 0x0000007d, 0xcccccccc, 0x0000007d},
|
|
{NoFlag, 0x00007fff, 0x55555555, 0x00007fff},
|
|
{NoFlag, 0xffff8003, 0x00007ffd, 0xffff8003},
|
|
{NoFlag, 0x80000001, 0x80000001, 0x80000001},
|
|
{NoFlag, 0xffffffff, 0xfffffffd, 0xffffffff},
|
|
{NoFlag, 0xffff8000, 0xfffffffe, 0xffff8000},
|
|
{NoFlag, 0xcccccccc, 0x0000007f, 0xcccccccc},
|
|
{NoFlag, 0x00000001, 0x00000002, 0x00000001},
|
|
{NoFlag, 0xffffff82, 0xffffff81, 0xffffff82},
|
|
{NoFlag, 0xfffffffd, 0x00007ffd, 0xfffffffd},
|
|
{NoFlag, 0x80000001, 0x33333333, 0x80000001},
|
|
{NoFlag, 0xffffff82, 0xffff8002, 0xffffff82},
|
|
{NoFlag, 0xffff8003, 0xfffffffd, 0xffff8003},
|
|
{NoFlag, 0xffffff81, 0x00000020, 0xffffff81},
|
|
{NoFlag, 0xffff8001, 0xffff8003, 0xffff8001},
|
|
{NoFlag, 0x00000001, 0x80000001, 0x00000001},
|
|
{NoFlag, 0xfffffffd, 0x00000002, 0xfffffffd},
|
|
{NoFlag, 0xffff8003, 0x7ffffffd, 0xffff8003},
|
|
{NoFlag, 0x0000007e, 0xaaaaaaaa, 0x0000007e},
|
|
{NoFlag, 0x7ffffffe, 0x7fffffff, 0x7ffffffe},
|
|
{NoFlag, 0x00007ffd, 0x00007ffe, 0x00007ffd},
|
|
{NoFlag, 0x00007fff, 0x80000001, 0x00007fff},
|
|
{NoFlag, 0x00007fff, 0xfffffffe, 0x00007fff},
|
|
{NoFlag, 0x00000001, 0xffffff80, 0x00000001},
|
|
{NoFlag, 0x55555555, 0xcccccccc, 0x55555555},
|
|
{NoFlag, 0x7ffffffd, 0xffffffe0, 0x7ffffffd},
|
|
{NoFlag, 0xffffff81, 0xfffffffe, 0xffffff81},
|
|
{NoFlag, 0xffffff82, 0x00007ffe, 0xffffff82},
|
|
{NoFlag, 0xffffff82, 0x80000001, 0xffffff82},
|
|
{NoFlag, 0x0000007f, 0xffff8001, 0x0000007f},
|
|
{NoFlag, 0x7ffffffd, 0xffffff83, 0x7ffffffd},
|
|
{NoFlag, 0xffffff82, 0xcccccccc, 0xffffff82},
|
|
{NoFlag, 0x00000020, 0xffffff83, 0x00000020},
|
|
{NoFlag, 0x00007ffe, 0x80000000, 0x00007ffe},
|
|
{NoFlag, 0x0000007f, 0xffff8000, 0x0000007f},
|
|
{NoFlag, 0xffffff82, 0x33333333, 0xffffff82},
|
|
{NoFlag, 0x7ffffffd, 0x7ffffffd, 0x7ffffffd},
|
|
{NoFlag, 0xffffff80, 0xffff8001, 0xffffff80},
|
|
{NoFlag, 0x00000002, 0xaaaaaaaa, 0x00000002},
|
|
{NoFlag, 0xffffffff, 0x7fffffff, 0xffffffff},
|
|
{NoFlag, 0xfffffffd, 0xfffffffe, 0xfffffffd},
|
|
{NoFlag, 0x00000020, 0x00000001, 0x00000020},
|
|
{NoFlag, 0x55555555, 0x00000001, 0x55555555},
|
|
{NoFlag, 0x55555555, 0xffffff80, 0x55555555},
|
|
{NoFlag, 0xffffffff, 0x00007fff, 0xffffffff},
|
|
{NoFlag, 0x00000020, 0xaaaaaaaa, 0x00000020},
|
|
{NoFlag, 0x00000002, 0x00007ffe, 0x00000002},
|
|
{NoFlag, 0x00000001, 0xcccccccc, 0x00000001},
|
|
{NoFlag, 0xffff8001, 0x00000000, 0xffff8001},
|
|
{NoFlag, 0x00000001, 0xffff8000, 0x00000001},
|
|
{NoFlag, 0xffffffe0, 0x00007fff, 0xffffffe0},
|
|
{NoFlag, 0xfffffffe, 0x00007fff, 0xfffffffe},
|
|
{NoFlag, 0xffffff83, 0x00000001, 0xffffff83},
|
|
{NoFlag, 0x00007fff, 0xffff8002, 0x00007fff},
|
|
{NoFlag, 0x7ffffffd, 0x7ffffffe, 0x7ffffffd},
|
|
{NoFlag, 0x80000001, 0xaaaaaaaa, 0x80000001},
|
|
{NoFlag, 0x80000001, 0xcccccccc, 0x80000001},
|
|
{NoFlag, 0x00007ffe, 0xffffffe0, 0x00007ffe},
|
|
{NoFlag, 0x00007ffe, 0xfffffffd, 0x00007ffe},
|
|
{NoFlag, 0x55555555, 0xaaaaaaaa, 0x55555555},
|
|
{NoFlag, 0xffffffe0, 0x00000001, 0xffffffe0},
|
|
{NoFlag, 0x0000007e, 0x00007fff, 0x0000007e},
|
|
{NoFlag, 0xfffffffe, 0xfffffffd, 0xfffffffe},
|
|
{NoFlag, 0x33333333, 0x0000007d, 0x33333333},
|
|
{NoFlag, 0xffffff81, 0x7fffffff, 0xffffff81},
|
|
{NoFlag, 0x0000007e, 0x0000007d, 0x0000007e},
|
|
{NoFlag, 0x00000001, 0xffffff81, 0x00000001},
|
|
{NoFlag, 0x80000000, 0x00000002, 0x80000000},
|
|
{NoFlag, 0x0000007d, 0xffff8003, 0x0000007d},
|
|
{NoFlag, 0x7ffffffe, 0x00007ffd, 0x7ffffffe},
|
|
{NoFlag, 0x7ffffffe, 0xaaaaaaaa, 0x7ffffffe},
|
|
{NoFlag, 0x00000000, 0xffff8000, 0x00000000},
|
|
{NoFlag, 0x33333333, 0x00000002, 0x33333333},
|
|
{NoFlag, 0xffffff81, 0xffffff83, 0xffffff81},
|
|
{NoFlag, 0x7ffffffe, 0x00007ffe, 0x7ffffffe},
|
|
{NoFlag, 0x80000000, 0x0000007d, 0x80000000},
|
|
{NoFlag, 0x00000020, 0x00000002, 0x00000020},
|
|
{NoFlag, 0x33333333, 0x80000001, 0x33333333},
|
|
{NoFlag, 0xffffff83, 0x00007ffd, 0xffffff83},
|
|
{NoFlag, 0x00007ffd, 0xffffff83, 0x00007ffd},
|
|
{NoFlag, 0xffff8001, 0x80000000, 0xffff8001},
|
|
{NoFlag, 0x00000000, 0x80000000, 0x00000000},
|
|
{NoFlag, 0xffffffe0, 0xffffffff, 0xffffffe0},
|
|
{NoFlag, 0x80000000, 0xffffff83, 0x80000000},
|
|
{NoFlag, 0x00000020, 0xffffff80, 0x00000020},
|
|
{NoFlag, 0x7ffffffd, 0xffff8001, 0x7ffffffd},
|
|
{NoFlag, 0x80000001, 0xffff8003, 0x80000001},
|
|
{NoFlag, 0x00007ffe, 0x7fffffff, 0x00007ffe},
|
|
{NoFlag, 0x7fffffff, 0x00000002, 0x7fffffff},
|
|
{NoFlag, 0xffffff83, 0xffff8003, 0xffffff83},
|
|
{NoFlag, 0xaaaaaaaa, 0xcccccccc, 0xaaaaaaaa},
|
|
{NoFlag, 0x0000007f, 0xffffff80, 0x0000007f},
|
|
{NoFlag, 0x80000001, 0x00007ffd, 0x80000001},
|
|
{NoFlag, 0xffff8000, 0x80000001, 0xffff8000},
|
|
{NoFlag, 0x00007fff, 0x00007ffd, 0x00007fff},
|
|
{NoFlag, 0x0000007e, 0x0000007f, 0x0000007e},
|
|
{NoFlag, 0x00000002, 0x0000007d, 0x00000002},
|
|
{NoFlag, 0x80000001, 0x7fffffff, 0x80000001},
|
|
{NoFlag, 0x0000007e, 0xffffff81, 0x0000007e},
|
|
{NoFlag, 0x7ffffffe, 0xffff8001, 0x7ffffffe},
|
|
{NoFlag, 0x7fffffff, 0x80000001, 0x7fffffff},
|
|
{NoFlag, 0x7ffffffd, 0x0000007f, 0x7ffffffd},
|
|
{NoFlag, 0xffffff81, 0xffffff81, 0xffffff81},
|
|
{NoFlag, 0x00000001, 0xfffffffd, 0x00000001},
|
|
{NoFlag, 0x00000001, 0xffffffff, 0x00000001},
|
|
{NoFlag, 0x7ffffffd, 0x55555555, 0x7ffffffd},
|
|
{NoFlag, 0x55555555, 0x0000007f, 0x55555555},
|
|
{NoFlag, 0x55555555, 0xffff8003, 0x55555555},
|
|
{NoFlag, 0xaaaaaaaa, 0x00007ffd, 0xaaaaaaaa},
|
|
{NoFlag, 0x0000007e, 0x33333333, 0x0000007e},
|
|
{NoFlag, 0xfffffffe, 0x80000001, 0xfffffffe},
|
|
{NoFlag, 0xfffffffe, 0xffff8000, 0xfffffffe},
|
|
{NoFlag, 0xffffffe0, 0xffffff81, 0xffffffe0},
|
|
{NoFlag, 0x7fffffff, 0x0000007f, 0x7fffffff},
|
|
{NoFlag, 0xffff8003, 0x0000007f, 0xffff8003},
|
|
{NoFlag, 0xffffff82, 0x00007ffd, 0xffffff82},
|
|
{NoFlag, 0x33333333, 0xffffffff, 0x33333333},
|
|
{NoFlag, 0xffffffe0, 0xcccccccc, 0xffffffe0},
|
|
{NoFlag, 0xffffff83, 0x7ffffffd, 0xffffff83},
|
|
{NoFlag, 0x0000007e, 0xcccccccc, 0x0000007e},
|
|
{NoFlag, 0x00000002, 0xfffffffd, 0x00000002},
|
|
{NoFlag, 0x00007fff, 0xcccccccc, 0x00007fff},
|
|
{NoFlag, 0x7fffffff, 0x00007fff, 0x7fffffff},
|
|
{NoFlag, 0xffffffe0, 0x33333333, 0xffffffe0},
|
|
{NoFlag, 0x0000007f, 0x0000007d, 0x0000007f},
|
|
{NoFlag, 0x0000007f, 0xffffffe0, 0x0000007f},
|
|
{NoFlag, 0x00007fff, 0xffff8000, 0x00007fff},
|
|
{NoFlag, 0x7fffffff, 0xffffffff, 0x7fffffff},
|
|
{NoFlag, 0xffff8000, 0x7ffffffd, 0xffff8000},
|
|
{NoFlag, 0xcccccccc, 0x0000007e, 0xcccccccc},
|
|
{NoFlag, 0x33333333, 0xffff8003, 0x33333333},
|
|
{NoFlag, 0x55555555, 0x00000002, 0x55555555},
|
|
{NoFlag, 0x00000001, 0x00000001, 0x00000001},
|
|
{NoFlag, 0xaaaaaaaa, 0x33333333, 0xaaaaaaaa},
|
|
{NoFlag, 0x7ffffffd, 0x00000001, 0x7ffffffd},
|
|
{NoFlag, 0xffffff82, 0xffff8000, 0xffffff82},
|
|
{NoFlag, 0x0000007d, 0x55555555, 0x0000007d},
|
|
{NoFlag, 0xffff8000, 0x7ffffffe, 0xffff8000},
|
|
{NoFlag, 0x7fffffff, 0xffffffe0, 0x7fffffff},
|
|
{NoFlag, 0x7fffffff, 0xffff8003, 0x7fffffff},
|
|
{NoFlag, 0xffffff82, 0xaaaaaaaa, 0xffffff82},
|
|
{NoFlag, 0xfffffffd, 0xffffff80, 0xfffffffd},
|
|
{NoFlag, 0x7ffffffd, 0x80000001, 0x7ffffffd},
|
|
{NoFlag, 0x00000000, 0x00007ffd, 0x00000000},
|
|
{NoFlag, 0xffffffff, 0xffffff80, 0xffffffff},
|
|
{NoFlag, 0xffffff80, 0xcccccccc, 0xffffff80},
|
|
{NoFlag, 0x00007ffe, 0x55555555, 0x00007ffe},
|
|
{NoFlag, 0xffff8000, 0xffff8000, 0xffff8000},
|
|
{NoFlag, 0xffffffff, 0xffff8000, 0xffffffff},
|
|
{NoFlag, 0x80000001, 0x0000007d, 0x80000001},
|
|
{NoFlag, 0xffffffe0, 0xffff8002, 0xffffffe0},
|
|
{NoFlag, 0xfffffffe, 0xffffffe0, 0xfffffffe},
|
|
{NoFlag, 0x80000000, 0xffff8003, 0x80000000},
|
|
{NoFlag, 0x80000001, 0xffffff81, 0x80000001},
|
|
{NoFlag, 0xffffffe0, 0x00007ffe, 0xffffffe0}};
|
|
|
|
static const Inputs kRdIsNotRnIsNotRm[] =
|
|
{{NoFlag, 0x0000007e, 0x0000007e, 0x0000007d},
|
|
{NoFlag, 0x55555555, 0x00000002, 0xffff8002},
|
|
{NoFlag, 0xffffffe0, 0x80000001, 0x00000000},
|
|
{NoFlag, 0x55555555, 0xffffff83, 0x00000002},
|
|
{NoFlag, 0xffffffe0, 0xffffffe0, 0x00000002},
|
|
{NoFlag, 0x00000000, 0x80000001, 0xffffff82},
|
|
{NoFlag, 0x80000001, 0x00007fff, 0x0000007f},
|
|
{NoFlag, 0xffffff80, 0x0000007d, 0x7ffffffe},
|
|
{NoFlag, 0xaaaaaaaa, 0x00000020, 0xffff8002},
|
|
{NoFlag, 0x33333333, 0x55555555, 0x00000001},
|
|
{NoFlag, 0x7ffffffe, 0x33333333, 0x00000000},
|
|
{NoFlag, 0x80000000, 0x7ffffffd, 0x55555555},
|
|
{NoFlag, 0xcccccccc, 0xffff8001, 0x7ffffffe},
|
|
{NoFlag, 0x00000020, 0xffffff83, 0xffff8003},
|
|
{NoFlag, 0x00007fff, 0xffffffe0, 0xffffff81},
|
|
{NoFlag, 0xffff8000, 0xffff8001, 0x0000007e},
|
|
{NoFlag, 0x33333333, 0x0000007e, 0x00000020},
|
|
{NoFlag, 0x0000007f, 0xfffffffd, 0xaaaaaaaa},
|
|
{NoFlag, 0xffffff83, 0xffffff82, 0x7ffffffd},
|
|
{NoFlag, 0x0000007e, 0xcccccccc, 0x7fffffff},
|
|
{NoFlag, 0xffff8001, 0x80000001, 0xffffffff},
|
|
{NoFlag, 0xffffff81, 0x00000020, 0x7ffffffe},
|
|
{NoFlag, 0xffffff83, 0xffffff81, 0xffffffe0},
|
|
{NoFlag, 0xffffffe0, 0xffffff81, 0xfffffffd},
|
|
{NoFlag, 0x80000001, 0xffffffff, 0xffffffff},
|
|
{NoFlag, 0x7ffffffe, 0xffff8000, 0xcccccccc},
|
|
{NoFlag, 0xffffff80, 0x00007ffe, 0xffffff82},
|
|
{NoFlag, 0x0000007e, 0x0000007d, 0xffff8003},
|
|
{NoFlag, 0xffff8002, 0xffffff81, 0x0000007e},
|
|
{NoFlag, 0x00007fff, 0x7ffffffd, 0xfffffffe},
|
|
{NoFlag, 0x00007ffe, 0x80000001, 0xffffff81},
|
|
{NoFlag, 0xffffff81, 0x00007ffd, 0xfffffffd},
|
|
{NoFlag, 0x00000020, 0x7fffffff, 0xffff8003},
|
|
{NoFlag, 0x0000007e, 0x0000007d, 0x33333333},
|
|
{NoFlag, 0xcccccccc, 0xffff8000, 0x00007ffe},
|
|
{NoFlag, 0x00007fff, 0xffff8000, 0x00000020},
|
|
{NoFlag, 0x00007ffd, 0x00007fff, 0xffffffe0},
|
|
{NoFlag, 0x7ffffffd, 0x00000000, 0x00007ffe},
|
|
{NoFlag, 0xffffff82, 0x33333333, 0x00000001},
|
|
{NoFlag, 0x7ffffffe, 0xffffff80, 0x00000020},
|
|
{NoFlag, 0x00007fff, 0xffffff83, 0x00007ffd},
|
|
{NoFlag, 0xffff8001, 0xffffffff, 0x80000001},
|
|
{NoFlag, 0x00000002, 0xffffff81, 0xcccccccc},
|
|
{NoFlag, 0x55555555, 0x0000007f, 0xffff8001},
|
|
{NoFlag, 0x80000000, 0x00000020, 0x80000000},
|
|
{NoFlag, 0xffffff83, 0x00007fff, 0xffffff80},
|
|
{NoFlag, 0x33333333, 0x7ffffffe, 0x7ffffffd},
|
|
{NoFlag, 0xffffff80, 0xffffffff, 0x00000001},
|
|
{NoFlag, 0x00007ffd, 0x7ffffffd, 0xffffff83},
|
|
{NoFlag, 0x33333333, 0xffff8001, 0xffffffe0},
|
|
{NoFlag, 0xffff8001, 0xffffff80, 0x00007ffd},
|
|
{NoFlag, 0xffffffe0, 0x00007fff, 0x00007ffe},
|
|
{NoFlag, 0x0000007d, 0x00000000, 0xffff8000},
|
|
{NoFlag, 0x7ffffffe, 0xaaaaaaaa, 0x7ffffffe},
|
|
{NoFlag, 0x0000007e, 0x00007ffd, 0xffffffe0},
|
|
{NoFlag, 0xfffffffd, 0xffffffe0, 0xffffff83},
|
|
{NoFlag, 0x00000001, 0xffffffe0, 0x7ffffffd},
|
|
{NoFlag, 0xfffffffd, 0xffff8002, 0x80000000},
|
|
{NoFlag, 0x00000020, 0xffffffff, 0x80000000},
|
|
{NoFlag, 0x00000001, 0x80000001, 0xffff8003},
|
|
{NoFlag, 0xffff8003, 0xaaaaaaaa, 0xffffff81},
|
|
{NoFlag, 0x0000007f, 0xfffffffd, 0xffffffe0},
|
|
{NoFlag, 0x00007ffe, 0xffffff80, 0x00007ffe},
|
|
{NoFlag, 0xffff8002, 0xffff8003, 0xffffffff},
|
|
{NoFlag, 0x7ffffffe, 0xffffff82, 0xffff8000},
|
|
{NoFlag, 0xffff8000, 0x00000002, 0x80000000},
|
|
{NoFlag, 0xffffff80, 0xffffff82, 0xffffff81},
|
|
{NoFlag, 0x00000000, 0xcccccccc, 0x00007ffd},
|
|
{NoFlag, 0x55555555, 0x00007ffe, 0x7fffffff},
|
|
{NoFlag, 0x00000002, 0xffffff81, 0xaaaaaaaa},
|
|
{NoFlag, 0x00007ffd, 0x0000007e, 0x00000002},
|
|
{NoFlag, 0xffffff83, 0x0000007e, 0xffffff80},
|
|
{NoFlag, 0xcccccccc, 0x00007ffe, 0xaaaaaaaa},
|
|
{NoFlag, 0x7ffffffe, 0x55555555, 0xffff8003},
|
|
{NoFlag, 0xfffffffd, 0x00000001, 0xffffff80},
|
|
{NoFlag, 0x00007ffd, 0x55555555, 0x80000001},
|
|
{NoFlag, 0x0000007f, 0x00000000, 0x0000007e},
|
|
{NoFlag, 0x7fffffff, 0xaaaaaaaa, 0x00000000},
|
|
{NoFlag, 0x7ffffffd, 0xffffff81, 0xcccccccc},
|
|
{NoFlag, 0xffffffe0, 0xcccccccc, 0xfffffffd},
|
|
{NoFlag, 0x00000002, 0xffff8000, 0x7ffffffd},
|
|
{NoFlag, 0xffffffe0, 0xffff8000, 0x80000001},
|
|
{NoFlag, 0x7ffffffd, 0xffff8003, 0xffff8001},
|
|
{NoFlag, 0x33333333, 0x00007ffd, 0x80000000},
|
|
{NoFlag, 0x7ffffffd, 0x00007fff, 0xcccccccc},
|
|
{NoFlag, 0xffffffff, 0xffffff80, 0x00007ffe},
|
|
{NoFlag, 0xffffff83, 0x7ffffffd, 0xaaaaaaaa},
|
|
{NoFlag, 0xfffffffd, 0xffff8003, 0x0000007f},
|
|
{NoFlag, 0xfffffffe, 0xfffffffe, 0xfffffffd},
|
|
{NoFlag, 0x00007fff, 0xfffffffe, 0x55555555},
|
|
{NoFlag, 0x7ffffffd, 0xfffffffe, 0xfffffffe},
|
|
{NoFlag, 0xfffffffe, 0xffffffff, 0x00007fff},
|
|
{NoFlag, 0x7ffffffd, 0x0000007e, 0x00007ffd},
|
|
{NoFlag, 0x7ffffffd, 0xffffffe0, 0x00000002},
|
|
{NoFlag, 0xffffffff, 0x00007ffd, 0xffffff81},
|
|
{NoFlag, 0xffff8001, 0x00000020, 0xfffffffd},
|
|
{NoFlag, 0x00007fff, 0x0000007d, 0xffffff83},
|
|
{NoFlag, 0x00000002, 0x55555555, 0x7ffffffe},
|
|
{NoFlag, 0x00007fff, 0x00007ffe, 0x00000002},
|
|
{NoFlag, 0x80000001, 0x7fffffff, 0x00007ffd},
|
|
{NoFlag, 0x0000007f, 0xffffffff, 0x00000001},
|
|
{NoFlag, 0xffff8001, 0x33333333, 0xffffff83},
|
|
{NoFlag, 0x00007fff, 0xcccccccc, 0x33333333},
|
|
{NoFlag, 0x33333333, 0xffffff80, 0x00000001},
|
|
{NoFlag, 0x00007fff, 0xcccccccc, 0x00007ffd},
|
|
{NoFlag, 0xffff8002, 0xfffffffd, 0x7ffffffe},
|
|
{NoFlag, 0x00007ffe, 0x7ffffffe, 0xffffff83},
|
|
{NoFlag, 0xffffffe0, 0x0000007f, 0xffff8001},
|
|
{NoFlag, 0x80000000, 0x00007fff, 0xffffff80},
|
|
{NoFlag, 0x7fffffff, 0x00007fff, 0x7ffffffe},
|
|
{NoFlag, 0xffff8002, 0x55555555, 0xffff8001},
|
|
{NoFlag, 0xffffff80, 0x00000000, 0xffffff80},
|
|
{NoFlag, 0x00007ffd, 0x00007fff, 0x00000002},
|
|
{NoFlag, 0x00000000, 0x55555555, 0xffff8003},
|
|
{NoFlag, 0x0000007f, 0xffff8003, 0x00000020},
|
|
{NoFlag, 0x00000000, 0xffff8002, 0x7fffffff},
|
|
{NoFlag, 0x00007fff, 0x55555555, 0x00000000},
|
|
{NoFlag, 0x7fffffff, 0x00007ffe, 0xffffff81},
|
|
{NoFlag, 0x0000007e, 0x80000001, 0x00007ffe},
|
|
{NoFlag, 0x7ffffffd, 0xaaaaaaaa, 0x00000020},
|
|
{NoFlag, 0xfffffffd, 0xfffffffe, 0x00000002},
|
|
{NoFlag, 0xffffff80, 0xffff8000, 0xffff8002},
|
|
{NoFlag, 0x0000007d, 0x00007fff, 0xaaaaaaaa},
|
|
{NoFlag, 0xfffffffd, 0xffffff80, 0x00007ffd},
|
|
{NoFlag, 0xffffff82, 0x80000000, 0xffffff80},
|
|
{NoFlag, 0xffffffe0, 0x55555555, 0xfffffffd},
|
|
{NoFlag, 0xffffffff, 0xffffffff, 0x00007ffd},
|
|
{NoFlag, 0x0000007e, 0xfffffffe, 0xffffff80},
|
|
{NoFlag, 0xffff8000, 0xffffff82, 0xffff8002},
|
|
{NoFlag, 0xaaaaaaaa, 0x7ffffffe, 0xffff8000},
|
|
{NoFlag, 0x55555555, 0xffff8003, 0xffffff80},
|
|
{NoFlag, 0x7ffffffe, 0x00000020, 0xffffffe0},
|
|
{NoFlag, 0x00000001, 0xffff8001, 0xffffffe0},
|
|
{NoFlag, 0xcccccccc, 0xffff8000, 0xffff8002},
|
|
{NoFlag, 0x80000000, 0x00000002, 0x7ffffffe},
|
|
{NoFlag, 0x00000002, 0x0000007f, 0xffffff81},
|
|
{NoFlag, 0xffffffff, 0x00000001, 0x7fffffff},
|
|
{NoFlag, 0xffffff83, 0x00000000, 0x33333333},
|
|
{NoFlag, 0xffff8000, 0xffffff83, 0xcccccccc},
|
|
{NoFlag, 0x80000000, 0x00000020, 0x00007ffd},
|
|
{NoFlag, 0xffffff81, 0xcccccccc, 0x00000000},
|
|
{NoFlag, 0xffffffff, 0xffff8000, 0x00007fff},
|
|
{NoFlag, 0xffff8003, 0xcccccccc, 0x00007ffe},
|
|
{NoFlag, 0xffffffff, 0xfffffffd, 0x7ffffffe},
|
|
{NoFlag, 0xffff8003, 0xaaaaaaaa, 0x55555555},
|
|
{NoFlag, 0x00000000, 0xaaaaaaaa, 0xffffff81},
|
|
{NoFlag, 0x0000007f, 0xfffffffe, 0xffff8000},
|
|
{NoFlag, 0x00000001, 0xffffffe0, 0xfffffffd},
|
|
{NoFlag, 0x33333333, 0x33333333, 0xfffffffd},
|
|
{NoFlag, 0xffffff82, 0xffff8002, 0x80000001},
|
|
{NoFlag, 0x55555555, 0xffffff83, 0xffffff83},
|
|
{NoFlag, 0xffffff83, 0xffff8002, 0x00000020},
|
|
{NoFlag, 0x0000007d, 0x7fffffff, 0x0000007f},
|
|
{NoFlag, 0x00000000, 0xcccccccc, 0xffff8000},
|
|
{NoFlag, 0x00000002, 0x7ffffffe, 0x00007fff},
|
|
{NoFlag, 0xffffff82, 0x7ffffffd, 0x7ffffffd},
|
|
{NoFlag, 0xaaaaaaaa, 0xfffffffd, 0xffff8002},
|
|
{NoFlag, 0xfffffffd, 0x00000002, 0x7fffffff},
|
|
{NoFlag, 0xfffffffe, 0xfffffffe, 0x00000020},
|
|
{NoFlag, 0x80000001, 0x0000007e, 0x00007ffe},
|
|
{NoFlag, 0x00007ffd, 0x00007ffd, 0xfffffffd},
|
|
{NoFlag, 0xffff8000, 0x0000007f, 0x00000002},
|
|
{NoFlag, 0x7ffffffd, 0x80000000, 0x7ffffffd},
|
|
{NoFlag, 0x0000007d, 0x00007fff, 0x80000001},
|
|
{NoFlag, 0xffffffff, 0x80000000, 0xaaaaaaaa},
|
|
{NoFlag, 0x00000000, 0xaaaaaaaa, 0xffff8001},
|
|
{NoFlag, 0xaaaaaaaa, 0xffffffe0, 0xffff8003},
|
|
{NoFlag, 0xffffff82, 0xffffffff, 0x00007ffd},
|
|
{NoFlag, 0x00000001, 0xffffff81, 0x00000001},
|
|
{NoFlag, 0x7fffffff, 0xaaaaaaaa, 0x80000001},
|
|
{NoFlag, 0x7fffffff, 0xffff8000, 0xffff8000},
|
|
{NoFlag, 0xaaaaaaaa, 0x00007ffd, 0xaaaaaaaa},
|
|
{NoFlag, 0x0000007f, 0x7ffffffe, 0x80000000},
|
|
{NoFlag, 0x00007ffd, 0x00007ffe, 0xffffff81},
|
|
{NoFlag, 0x0000007d, 0x0000007d, 0xffff8002},
|
|
{NoFlag, 0x80000001, 0x00000002, 0xffffff81},
|
|
{NoFlag, 0xffff8000, 0xfffffffd, 0x7ffffffd},
|
|
{NoFlag, 0xfffffffe, 0x00000020, 0xffffff80},
|
|
{NoFlag, 0x00000020, 0x7fffffff, 0xffffffe0},
|
|
{NoFlag, 0xffff8002, 0xffff8002, 0x0000007f},
|
|
{NoFlag, 0xffff8003, 0x7fffffff, 0xffff8002},
|
|
{NoFlag, 0x00000020, 0xfffffffd, 0x00000020},
|
|
{NoFlag, 0x7ffffffd, 0xffffffe0, 0x0000007e},
|
|
{NoFlag, 0x00000020, 0x00000020, 0x7ffffffe},
|
|
{NoFlag, 0xfffffffe, 0x0000007f, 0xffff8000},
|
|
{NoFlag, 0x80000001, 0x80000001, 0x0000007d},
|
|
{NoFlag, 0x55555555, 0x0000007f, 0x00007ffd},
|
|
{NoFlag, 0x55555555, 0xffffffe0, 0xffffff82},
|
|
{NoFlag, 0xffff8001, 0x0000007e, 0xffff8002},
|
|
{NoFlag, 0xffffffe0, 0x55555555, 0x0000007f},
|
|
{NoFlag, 0xffff8000, 0x7fffffff, 0x7ffffffe},
|
|
{NoFlag, 0xffffffff, 0xfffffffe, 0xffffff80},
|
|
{NoFlag, 0xffff8001, 0xffff8002, 0x33333333},
|
|
{NoFlag, 0x7ffffffd, 0xfffffffd, 0xaaaaaaaa},
|
|
{NoFlag, 0xaaaaaaaa, 0xfffffffd, 0x00000020},
|
|
{NoFlag, 0x0000007f, 0x00007ffe, 0x55555555},
|
|
{NoFlag, 0x00000020, 0x00000020, 0x00000002},
|
|
{NoFlag, 0x80000001, 0xffff8002, 0xfffffffe},
|
|
{NoFlag, 0x7fffffff, 0x80000001, 0xffff8002},
|
|
{NoFlag, 0x00000020, 0x0000007e, 0x33333333}};
|
|
|
|
static const Inputs kShiftTypes[] =
|
|
{{NoFlag, 0xabababab, 0xabababab, 0x00000000},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x00000001},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x00000002},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x00000020},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x0000007d},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x0000007e},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x0000007f},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x00007ffd},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x00007ffe},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x00007fff},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x33333333},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x55555555},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x7ffffffd},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x7ffffffe},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x7fffffff},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x80000000},
|
|
{NoFlag, 0xabababab, 0xabababab, 0x80000001},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xaaaaaaaa},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xcccccccc},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffff8000},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffff8001},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffff8002},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffff8003},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffffff80},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffffff81},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffffff82},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffffff83},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffffffe0},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xfffffffd},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xfffffffe},
|
|
{NoFlag, 0xabababab, 0xabababab, 0xffffffff}};
|
|
|
|
|
|
// A loop will be generated for each element of this array.
|
|
const TestLoopData kTests[] = {{{eq, r0, r0, r0, LSR, 1},
|
|
"eq r0 r0 r0 LSR 1",
|
|
"Condition_eq_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{ne, r0, r0, r0, LSR, 1},
|
|
"ne r0 r0 r0 LSR 1",
|
|
"Condition_ne_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{cs, r0, r0, r0, LSR, 1},
|
|
"cs r0 r0 r0 LSR 1",
|
|
"Condition_cs_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{cc, r0, r0, r0, LSR, 1},
|
|
"cc r0 r0 r0 LSR 1",
|
|
"Condition_cc_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{mi, r0, r0, r0, LSR, 1},
|
|
"mi r0 r0 r0 LSR 1",
|
|
"Condition_mi_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{pl, r0, r0, r0, LSR, 1},
|
|
"pl r0 r0 r0 LSR 1",
|
|
"Condition_pl_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{vs, r0, r0, r0, LSR, 1},
|
|
"vs r0 r0 r0 LSR 1",
|
|
"Condition_vs_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{vc, r0, r0, r0, LSR, 1},
|
|
"vc r0 r0 r0 LSR 1",
|
|
"Condition_vc_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{hi, r0, r0, r0, LSR, 1},
|
|
"hi r0 r0 r0 LSR 1",
|
|
"Condition_hi_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{ls, r0, r0, r0, LSR, 1},
|
|
"ls r0 r0 r0 LSR 1",
|
|
"Condition_ls_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{ge, r0, r0, r0, LSR, 1},
|
|
"ge r0 r0 r0 LSR 1",
|
|
"Condition_ge_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{lt, r0, r0, r0, LSR, 1},
|
|
"lt r0 r0 r0 LSR 1",
|
|
"Condition_lt_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{gt, r0, r0, r0, LSR, 1},
|
|
"gt r0 r0 r0 LSR 1",
|
|
"Condition_gt_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{le, r0, r0, r0, LSR, 1},
|
|
"le r0 r0 r0 LSR 1",
|
|
"Condition_le_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{al, r0, r0, r0, LSR, 1},
|
|
"al r0 r0 r0 LSR 1",
|
|
"Condition_al_r0_r0_r0_LSR_1",
|
|
ARRAY_SIZE(kCondition),
|
|
kCondition},
|
|
{{al, r3, r3, r4, LSR, 1},
|
|
"al r3 r3 r4 LSR 1",
|
|
"RdIsRn_al_r3_r3_r4_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r2, r2, r12, LSR, 1},
|
|
"al r2 r2 r12 LSR 1",
|
|
"RdIsRn_al_r2_r2_r12_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r8, r8, r5, LSR, 1},
|
|
"al r8 r8 r5 LSR 1",
|
|
"RdIsRn_al_r8_r8_r5_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r14, r14, r0, LSR, 1},
|
|
"al r14 r14 r0 LSR 1",
|
|
"RdIsRn_al_r14_r14_r0_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r11, r11, r10, LSR, 1},
|
|
"al r11 r11 r10 LSR 1",
|
|
"RdIsRn_al_r11_r11_r10_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r12, r12, r10, LSR, 1},
|
|
"al r12 r12 r10 LSR 1",
|
|
"RdIsRn_al_r12_r12_r10_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r4, r4, r8, LSR, 1},
|
|
"al r4 r4 r8 LSR 1",
|
|
"RdIsRn_al_r4_r4_r8_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r5, r5, r14, LSR, 1},
|
|
"al r5 r5 r14 LSR 1",
|
|
"RdIsRn_al_r5_r5_r14_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r0, r0, r6, LSR, 1},
|
|
"al r0 r0 r6 LSR 1",
|
|
"RdIsRn_al_r0_r0_r6_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r12, r12, r1, LSR, 1},
|
|
"al r12 r12 r1 LSR 1",
|
|
"RdIsRn_al_r12_r12_r1_LSR_1",
|
|
ARRAY_SIZE(kRdIsRn),
|
|
kRdIsRn},
|
|
{{al, r6, r11, r6, LSR, 1},
|
|
"al r6 r11 r6 LSR 1",
|
|
"RdIsRm_al_r6_r11_r6_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r11, r9, r11, LSR, 1},
|
|
"al r11 r9 r11 LSR 1",
|
|
"RdIsRm_al_r11_r9_r11_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r0, r8, r0, LSR, 1},
|
|
"al r0 r8 r0 LSR 1",
|
|
"RdIsRm_al_r0_r8_r0_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r2, r11, r2, LSR, 1},
|
|
"al r2 r11 r2 LSR 1",
|
|
"RdIsRm_al_r2_r11_r2_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r9, r4, r9, LSR, 1},
|
|
"al r9 r4 r9 LSR 1",
|
|
"RdIsRm_al_r9_r4_r9_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r14, r10, r14, LSR, 1},
|
|
"al r14 r10 r14 LSR 1",
|
|
"RdIsRm_al_r14_r10_r14_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r7, r0, r7, LSR, 1},
|
|
"al r7 r0 r7 LSR 1",
|
|
"RdIsRm_al_r7_r0_r7_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r4, r9, r4, LSR, 1},
|
|
"al r4 r9 r4 LSR 1",
|
|
"RdIsRm_al_r4_r9_r4_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r6, r10, r6, LSR, 1},
|
|
"al r6 r10 r6 LSR 1",
|
|
"RdIsRm_al_r6_r10_r6_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r7, r6, r7, LSR, 1},
|
|
"al r7 r6 r7 LSR 1",
|
|
"RdIsRm_al_r7_r6_r7_LSR_1",
|
|
ARRAY_SIZE(kRdIsRm),
|
|
kRdIsRm},
|
|
{{al, r3, r9, r10, LSR, 1},
|
|
"al r3 r9 r10 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r3_r9_r10_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r7, r12, r5, LSR, 1},
|
|
"al r7 r12 r5 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r7_r12_r5_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r8, r5, r6, LSR, 1},
|
|
"al r8 r5 r6 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r8_r5_r6_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r0, r6, r0, LSR, 1},
|
|
"al r0 r6 r0 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r0_r6_r0_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r11, r7, r8, LSR, 1},
|
|
"al r11 r7 r8 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r11_r7_r8_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r12, r2, r3, LSR, 1},
|
|
"al r12 r2 r3 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r12_r2_r3_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r7, r4, r10, LSR, 1},
|
|
"al r7 r4 r10 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r7_r4_r10_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r9, r6, r1, LSR, 1},
|
|
"al r9 r6 r1 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r9_r6_r1_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r10, r14, r3, LSR, 1},
|
|
"al r10 r14 r3 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r10_r14_r3_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r14, r3, r6, LSR, 1},
|
|
"al r14 r3 r6 LSR 1",
|
|
"RdIsNotRnIsNotRm_al_r14_r3_r6_LSR_1",
|
|
ARRAY_SIZE(kRdIsNotRnIsNotRm),
|
|
kRdIsNotRnIsNotRm},
|
|
{{al, r0, r1, r2, LSR, 1},
|
|
"al r0 r1 r2 LSR 1",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_1",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 2},
|
|
"al r0 r1 r2 LSR 2",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_2",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 3},
|
|
"al r0 r1 r2 LSR 3",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_3",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 4},
|
|
"al r0 r1 r2 LSR 4",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_4",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 5},
|
|
"al r0 r1 r2 LSR 5",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_5",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 6},
|
|
"al r0 r1 r2 LSR 6",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_6",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 7},
|
|
"al r0 r1 r2 LSR 7",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_7",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 8},
|
|
"al r0 r1 r2 LSR 8",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_8",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 9},
|
|
"al r0 r1 r2 LSR 9",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_9",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 10},
|
|
"al r0 r1 r2 LSR 10",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_10",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 11},
|
|
"al r0 r1 r2 LSR 11",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_11",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 12},
|
|
"al r0 r1 r2 LSR 12",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_12",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 13},
|
|
"al r0 r1 r2 LSR 13",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_13",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 14},
|
|
"al r0 r1 r2 LSR 14",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_14",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 15},
|
|
"al r0 r1 r2 LSR 15",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_15",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 16},
|
|
"al r0 r1 r2 LSR 16",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_16",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 17},
|
|
"al r0 r1 r2 LSR 17",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_17",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 18},
|
|
"al r0 r1 r2 LSR 18",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_18",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 19},
|
|
"al r0 r1 r2 LSR 19",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_19",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 20},
|
|
"al r0 r1 r2 LSR 20",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_20",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 21},
|
|
"al r0 r1 r2 LSR 21",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_21",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 22},
|
|
"al r0 r1 r2 LSR 22",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_22",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 23},
|
|
"al r0 r1 r2 LSR 23",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_23",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 24},
|
|
"al r0 r1 r2 LSR 24",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_24",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 25},
|
|
"al r0 r1 r2 LSR 25",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_25",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 26},
|
|
"al r0 r1 r2 LSR 26",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_26",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 27},
|
|
"al r0 r1 r2 LSR 27",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_27",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 28},
|
|
"al r0 r1 r2 LSR 28",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_28",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 29},
|
|
"al r0 r1 r2 LSR 29",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_29",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 30},
|
|
"al r0 r1 r2 LSR 30",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_30",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 31},
|
|
"al r0 r1 r2 LSR 31",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_31",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, LSR, 32},
|
|
"al r0 r1 r2 LSR 32",
|
|
"ShiftTypes_al_r0_r1_r2_LSR_32",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 1},
|
|
"al r0 r1 r2 ASR 1",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_1",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 2},
|
|
"al r0 r1 r2 ASR 2",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_2",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 3},
|
|
"al r0 r1 r2 ASR 3",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_3",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 4},
|
|
"al r0 r1 r2 ASR 4",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_4",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 5},
|
|
"al r0 r1 r2 ASR 5",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_5",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 6},
|
|
"al r0 r1 r2 ASR 6",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_6",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 7},
|
|
"al r0 r1 r2 ASR 7",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_7",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 8},
|
|
"al r0 r1 r2 ASR 8",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_8",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 9},
|
|
"al r0 r1 r2 ASR 9",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_9",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 10},
|
|
"al r0 r1 r2 ASR 10",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_10",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 11},
|
|
"al r0 r1 r2 ASR 11",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_11",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 12},
|
|
"al r0 r1 r2 ASR 12",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_12",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 13},
|
|
"al r0 r1 r2 ASR 13",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_13",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 14},
|
|
"al r0 r1 r2 ASR 14",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_14",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 15},
|
|
"al r0 r1 r2 ASR 15",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_15",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 16},
|
|
"al r0 r1 r2 ASR 16",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_16",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 17},
|
|
"al r0 r1 r2 ASR 17",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_17",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 18},
|
|
"al r0 r1 r2 ASR 18",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_18",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 19},
|
|
"al r0 r1 r2 ASR 19",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_19",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 20},
|
|
"al r0 r1 r2 ASR 20",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_20",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 21},
|
|
"al r0 r1 r2 ASR 21",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_21",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 22},
|
|
"al r0 r1 r2 ASR 22",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_22",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 23},
|
|
"al r0 r1 r2 ASR 23",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_23",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 24},
|
|
"al r0 r1 r2 ASR 24",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_24",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 25},
|
|
"al r0 r1 r2 ASR 25",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_25",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 26},
|
|
"al r0 r1 r2 ASR 26",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_26",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 27},
|
|
"al r0 r1 r2 ASR 27",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_27",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 28},
|
|
"al r0 r1 r2 ASR 28",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_28",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 29},
|
|
"al r0 r1 r2 ASR 29",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_29",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 30},
|
|
"al r0 r1 r2 ASR 30",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_30",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 31},
|
|
"al r0 r1 r2 ASR 31",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_31",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes},
|
|
{{al, r0, r1, r2, ASR, 32},
|
|
"al r0 r1 r2 ASR 32",
|
|
"ShiftTypes_al_r0_r1_r2_ASR_32",
|
|
ARRAY_SIZE(kShiftTypes),
|
|
kShiftTypes}};
|
|
|
|
// We record all inputs to the instructions as outputs. This way, we also check
|
|
// that what shouldn't change didn't change.
|
|
struct TestResult {
|
|
size_t output_size;
|
|
const Inputs* outputs;
|
|
};
|
|
|
|
// These headers each contain an array of `TestResult` with the reference output
|
|
// values. The reference arrays are names `kReference{mnemonic}`.
|
|
#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-adc-t32.h"
|
|
#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-adcs-t32.h"
|
|
#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-add-t32.h"
|
|
#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-adds-t32.h"
|
|
#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-and-t32.h"
|
|
#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-ands-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-bic-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-bics-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-eor-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-eors-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-orn-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-orns-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-orr-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-orrs-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-rsb-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-rsbs-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-sbc-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-sbcs-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-sub-t32.h"
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#include "aarch32/traces/simulator-cond-rd-rn-operand-rm-shift-amount-1to32-subs-t32.h"
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// The maximum number of errors to report in detail for each test.
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const unsigned kErrorReportLimit = 8;
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typedef void (MacroAssembler::*Fn)(Condition cond,
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Register rd,
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Register rn,
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const Operand& op);
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void TestHelper(Fn instruction,
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const char* mnemonic,
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const TestResult reference[]) {
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SETUP();
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masm.UseT32();
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START();
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// Data to compare to `reference`.
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TestResult* results[ARRAY_SIZE(kTests)];
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// Test cases for memory bound instructions may allocate a buffer and save its
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// address in this array.
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byte* scratch_memory_buffers[ARRAY_SIZE(kTests)];
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// Generate a loop for each element in `kTests`. Each loop tests one specific
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// instruction.
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for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
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// Allocate results on the heap for this test.
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results[i] = new TestResult;
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results[i]->outputs = new Inputs[kTests[i].input_size];
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results[i]->output_size = kTests[i].input_size;
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size_t input_stride = sizeof(kTests[i].inputs[0]) * kTests[i].input_size;
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VIXL_ASSERT(IsUint32(input_stride));
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scratch_memory_buffers[i] = NULL;
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Label loop;
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UseScratchRegisterScope scratch_registers(&masm);
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// Include all registers from r0 ro r12.
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scratch_registers.Include(RegisterList(0x1fff));
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// Values to pass to the macro-assembler.
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Condition cond = kTests[i].operands.cond;
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Register rd = kTests[i].operands.rd;
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Register rn = kTests[i].operands.rn;
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Register rm = kTests[i].operands.rm;
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ShiftType shift = kTests[i].operands.shift;
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uint32_t amount = kTests[i].operands.amount;
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Operand op(rm, shift, amount);
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scratch_registers.Exclude(rd);
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scratch_registers.Exclude(rn);
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scratch_registers.Exclude(rm);
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// Allocate reserved registers for our own use.
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Register input_ptr = scratch_registers.Acquire();
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Register input_end = scratch_registers.Acquire();
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Register result_ptr = scratch_registers.Acquire();
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// Initialize `input_ptr` to the first element and `input_end` the address
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// after the array.
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__ Mov(input_ptr, Operand::From(kTests[i].inputs));
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__ Add(input_end, input_ptr, static_cast<uint32_t>(input_stride));
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__ Mov(result_ptr, Operand::From(results[i]->outputs));
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__ Bind(&loop);
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{
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UseScratchRegisterScope temp_registers(&masm);
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Register nzcv_bits = temp_registers.Acquire();
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Register saved_q_bit = temp_registers.Acquire();
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// Save the `Q` bit flag.
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__ Mrs(saved_q_bit, APSR);
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__ And(saved_q_bit, saved_q_bit, QFlag);
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// Set the `NZCV` and `Q` flags together.
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__ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr)));
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__ Orr(nzcv_bits, nzcv_bits, saved_q_bit);
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__ Msr(APSR_nzcvq, nzcv_bits);
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}
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__ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd)));
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__ Ldr(rn, MemOperand(input_ptr, offsetof(Inputs, rn)));
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__ Ldr(rm, MemOperand(input_ptr, offsetof(Inputs, rm)));
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(masm.*instruction)(cond, rd, rn, op);
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{
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UseScratchRegisterScope temp_registers(&masm);
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Register nzcv_bits = temp_registers.Acquire();
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__ Mrs(nzcv_bits, APSR);
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// Only record the NZCV bits.
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__ And(nzcv_bits, nzcv_bits, NZCVFlag);
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__ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr)));
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}
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__ Str(rd, MemOperand(result_ptr, offsetof(Inputs, rd)));
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__ Str(rn, MemOperand(result_ptr, offsetof(Inputs, rn)));
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__ Str(rm, MemOperand(result_ptr, offsetof(Inputs, rm)));
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// Advance the result pointer.
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__ Add(result_ptr, result_ptr, Operand::From(sizeof(kTests[i].inputs[0])));
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// Loop back until `input_ptr` is lower than `input_base`.
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__ Add(input_ptr, input_ptr, Operand::From(sizeof(kTests[i].inputs[0])));
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__ Cmp(input_ptr, input_end);
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__ B(ne, &loop);
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}
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END();
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RUN();
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if (Test::generate_test_trace()) {
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// Print the results.
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for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
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printf("const Inputs kOutputs_%s_%s[] = {\n",
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mnemonic,
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kTests[i].identifier);
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for (size_t j = 0; j < results[i]->output_size; j++) {
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printf(" { ");
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printf("0x%08" PRIx32, results[i]->outputs[j].apsr);
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printf(", ");
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printf("0x%08" PRIx32, results[i]->outputs[j].rd);
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printf(", ");
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printf("0x%08" PRIx32, results[i]->outputs[j].rn);
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printf(", ");
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printf("0x%08" PRIx32, results[i]->outputs[j].rm);
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printf(" },\n");
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}
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printf("};\n");
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}
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printf("const TestResult kReference%s[] = {\n", mnemonic);
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for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
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printf(" {\n");
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printf(" ARRAY_SIZE(kOutputs_%s_%s),\n",
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mnemonic,
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kTests[i].identifier);
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printf(" kOutputs_%s_%s,\n", mnemonic, kTests[i].identifier);
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printf(" },\n");
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}
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printf("};\n");
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} else if (kCheckSimulatorTestResults) {
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// Check the results.
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unsigned total_error_count = 0;
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for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
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bool instruction_has_errors = false;
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for (size_t j = 0; j < kTests[i].input_size; j++) {
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uint32_t apsr = results[i]->outputs[j].apsr;
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uint32_t rd = results[i]->outputs[j].rd;
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uint32_t rn = results[i]->outputs[j].rn;
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uint32_t rm = results[i]->outputs[j].rm;
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uint32_t apsr_input = kTests[i].inputs[j].apsr;
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uint32_t rd_input = kTests[i].inputs[j].rd;
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uint32_t rn_input = kTests[i].inputs[j].rn;
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uint32_t rm_input = kTests[i].inputs[j].rm;
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uint32_t apsr_ref = reference[i].outputs[j].apsr;
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uint32_t rd_ref = reference[i].outputs[j].rd;
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uint32_t rn_ref = reference[i].outputs[j].rn;
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uint32_t rm_ref = reference[i].outputs[j].rm;
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if (((apsr != apsr_ref) || (rd != rd_ref) || (rn != rn_ref) ||
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(rm != rm_ref)) &&
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(++total_error_count <= kErrorReportLimit)) {
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// Print the instruction once even if it triggered multiple failures.
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if (!instruction_has_errors) {
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printf("Error(s) when testing \"%s %s\":\n",
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mnemonic,
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kTests[i].operands_description);
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instruction_has_errors = true;
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}
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// Print subsequent errors.
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printf(" Input: ");
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printf("0x%08" PRIx32, apsr_input);
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printf(", ");
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printf("0x%08" PRIx32, rd_input);
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printf(", ");
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printf("0x%08" PRIx32, rn_input);
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printf(", ");
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printf("0x%08" PRIx32, rm_input);
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printf("\n");
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printf(" Expected: ");
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printf("0x%08" PRIx32, apsr_ref);
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printf(", ");
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printf("0x%08" PRIx32, rd_ref);
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printf(", ");
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printf("0x%08" PRIx32, rn_ref);
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printf(", ");
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printf("0x%08" PRIx32, rm_ref);
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printf("\n");
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printf(" Found: ");
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printf("0x%08" PRIx32, apsr);
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printf(", ");
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printf("0x%08" PRIx32, rd);
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printf(", ");
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printf("0x%08" PRIx32, rn);
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printf(", ");
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printf("0x%08" PRIx32, rm);
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printf("\n\n");
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}
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}
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}
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if (total_error_count > kErrorReportLimit) {
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printf("%u other errors follow.\n",
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total_error_count - kErrorReportLimit);
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}
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VIXL_CHECK(total_error_count == 0);
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} else {
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VIXL_WARNING("Assembled the code, but did not run anything.\n");
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}
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for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
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delete[] results[i]->outputs;
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delete results[i];
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delete[] scratch_memory_buffers[i];
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}
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}
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// Instantiate tests for each instruction in the list.
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// TODO: Remove this limitation by having a sandboxing mechanism.
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#if defined(VIXL_HOST_POINTER_32)
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#define TEST(mnemonic) \
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void Test_##mnemonic() { \
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TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
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} \
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Test test_##mnemonic( \
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"AARCH32_SIMULATOR_COND_RD_RN_OPERAND_RM_SHIFT_AMOUNT_1TO32_" #mnemonic \
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"_T32", \
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&Test_##mnemonic);
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#else
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#define TEST(mnemonic) \
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void Test_##mnemonic() { \
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VIXL_WARNING("This test can only run on a 32-bit host.\n"); \
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USE(TestHelper); \
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} \
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Test test_##mnemonic( \
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"AARCH32_SIMULATOR_COND_RD_RN_OPERAND_RM_SHIFT_AMOUNT_1TO32_" #mnemonic \
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"_T32", \
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&Test_##mnemonic);
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#endif
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FOREACH_INSTRUCTION(TEST)
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#undef TEST
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} // namespace
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#endif
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} // namespace aarch32
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} // namespace vixl
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