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// Copyright 2015, VIXL authors
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// * Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
// * Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
// * Neither the name of ARM Limited nor the names of its contributors may be
// used to endorse or promote products derived from this software without
// specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// ---------------------------------------------------------------------
// This file is auto generated using tools/generate_simulator_traces.py.
//
// PLEASE DO NOT EDIT.
// ---------------------------------------------------------------------
#ifndef VIXL_SIM_FCVTMU_WH_TRACE_AARCH64_H_
#define VIXL_SIM_FCVTMU_WH_TRACE_AARCH64_H_
const uint32_t kExpected_fcvtmu_wh[] = {
0u,
0u,
0u,
0u,
0u,
0u,
1u,
1u,
1u,
10u,
65504u,
4294967295u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
1024u,
1025u,
1026u,
1027u,
1347u,
2044u,
2045u,
2046u,
2047u,
512u,
512u,
513u,
513u,
912u,
1022u,
1022u,
1023u,
1023u,
256u,
256u,
256u,
256u,
332u,
511u,
511u,
511u,
511u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
0u,
};
const unsigned kExpectedCount_fcvtmu_wh = 101;
#endif // VIXL_SIM_FCVTMU_WH_TRACE_AARCH64_H_